Data Sheet

AD3531/AD3531R

REGISTER DETAILS

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Rev. 0 | 42 of 44

Initiates transfer of Input_Chn to DAC_Chn; Only takes effect on enabled channels identified by SW_LDAC_En_0

0

0

1

0

2

0

3

0

4

0

5

0

6

0

7

0

[7] SLD_TRIG_0 (W)

[6:0] RESERVED

Table 36. Bit Descriptions for SW_LDAC_TRIG_0

Bits

Bit Name

Description

Reset

Access

7

SLD_TRIG_0

Software LDAC Trigger 0. When set, initiates transfer of Input_Chn to DAC_Chn, where n is the channel number

as enabled by SW_LDAC_En_0. Writing 0 will have no effect.

0x0

W

[6:0]

RESERVED

Reserved.

0x0

R

MULTIPLE INPUT REGISTER

Address: 0xDF, Reset: 0x0000, Name: MULTI_INPUT_CH

Data written to this register also writes all Input_Chn selected in Multi_Input_Sel_0; read data will always return the latest data written

0

0

1

0

2

0

3

0

4

0

5

0

6

0

7

0

8

0

9

0

10

0

11

0

12

0

13

0

14

0

15

0

[15:0] MULTI_INPUT_VAL (R/W)

Table 37. Bit Descriptions for MULTI_INPUT_CH

Bits

Bit Name

Description

Reset

Access

[15:0]

MULTI_INPUT_VAL

Multiple Input Value. Data to be written to all Input_Chn selected in Multi_Input_Sel_0. Read data will

always return the latest data written.

0x0

R/W

MULTIPLE INPUT SELECT 0 REGISTER

Address: 0xE0, Reset: 0x0F, Name: MULTI_INPUT_SEL_0

Select which Input_Chn will be written when a write operation is executed on Multi_Input_Ch; only applies Input_Ch0 to Input_Ch3

0

1

1

1

2

1

3

1

4

0

5

0

6

0

7

0

[7:4] RESERVED

[0] MI_SEL_CH_0 (R/W)

[3] MI_SEL_CH_3 (R/W)

[1] MI_SEL_CH_1 (R/W)

[2] MI_SEL_CH_2 (R/W)

Table 38. Bit Descriptions for MULTI_INPUT_SEL_0

Bits

Bit Name

Description

Reset

Access

[7:4]

RESERVED

Reserved.

0x0

R

3

MI_SEL_CH_3

Multiple Input Select Channel 3. If selected, write operation on Multi_Input_Ch also writes Input_Ch3 with the

same data. If deselected, write operation on Multi_DAC_Ch will have no effect on Input_Ch3.

0x1

R/W

0: MI Sel 0. Deselect Input_Ch3 for Multi_Input_Ch operation.

1: MI Sel 1. Select Input_Ch3 for Multi_Input_Ch operation.

2

MI_SEL_CH_2

Multiple Input Select Channel 2. If selected, write operation on Multi_Input_Ch also writes Input_Ch2 with the

same data. If deselected, write operation on Multi_DAC_Ch will have no effect on Input_Ch2.

0x1

R/W

0: MI Sel 0. Deselect Input_Ch2 for Multi_Input_Ch operation.

1: MI Sel 1. Select Input_Ch2 for Multi_Input_Ch operation.

1

MI_SEL_CH_1

Multiple Input Select Channel 1. If selected, write operation on Multi_Input_Ch also writes Input_Ch1 with the

same data. If deselected, write operation on Multi_DAC_Ch will have no effect on Input_Ch1.

0x1

R/W

0: MI Sel 0. Deselect Input_Ch1 for Multi_Input_Ch operation.

1: MI Sel 1. Select Input_Ch1 for Multi_Input_Ch operation.