CD74HC4051-EP

SCLS464A – SEPTEMBER 2002 – REVISED JANUARY 2015

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6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VCC – VEE

(2)

–0.5

10.5

VCC

Supply voltage

–0.5

7

V

VEE

0.5

–7

IIK

Input clamp current (VI < –0.5 V or VI > VCC + 0.5 V)

–20

20

mA

IOK

Output clamp current (VO < VEE – 0.5 V or VO > VCC + 0.5 V)

–20

20

mA

Switch current (VI > VEE – 0.5 V or VI < VCC + 0.5 V)

–25

25

mA

Continuous current through VCC or GND

–50

50

mA

IEE

VEE current

0

20

mA

θJA

Package thermal impedance(3)

73

°C/W

TJ

Maximum junction temperature

150

°C

Tstg

Storage temperature

–65

150

°C

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

All voltages referenced to GND unless otherwise specified.

(3)

The package thermal impedance is calculated in accordance with JESD 51-7.

6.2 ESD Ratings

VALUE

UNIT

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1)

±2000

V(ESD)

Electrostatic discharge

V

Charged device model (CDM), per JEDEC specification JESD22-C101,

±500

all pins(2)

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

(1)

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

VCC

Supply voltage(2)

2 6

6

V

Supply voltage, VCC – VEE (see Figure 4)

2 10

10

V

VEE

Supply voltage, (see (2) and Figure 5)

0 –6

–6

V

VCC = 2 V

1.5

VIH

High-level input voltage

VCC = 4.5 V

3.15

V

VCC = 6 V

4.2

VCC = 2 V

0.5

VIL

Low-level input voltage

VCC = 4.5 V

1.35

V

VCC = 6 V

1.8

VI

Input control voltage

0

VCC

V

VIS

Analog switch I/O voltage

VEE

VCC

V

VCC = 2 V

0

1000

Input transition (rise and

tt

VCC = 4.5 V

0

500

ns

fall) time

VCC = 6 V

0

400

(1)

All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,

Implications of Slow or Floating CMOS Inputs, SCBA004.

(2)

In certain applications, the external load resistor current may include both VCC and signal-line components. To avoid drawing VCC

current when switch current flows into the transmission gate inputs, the voltage drop across the bidirectional switch must not exceed 0.6

V (calculated from ron values shown in Electrical Characteristics table). No VCC current flows through RL if the switch current flows into

the COM OUT/IN A terminal.

4

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