p

50ns 10ns

R max

3.12k

3.5V

2.7 V

30pF ln(1

)

5V

2.7V

-

-

=

=

W

-

´

-

-

p

500ns

R

14k

3.5V

30pF ln(1

)

5V

-

=

=

W

´

-

p

t

R

3.5V

C ln(1

)

5V

-

=

´

-

p

t

R

C

IH

CC

V

V

(1 e

)

-

´

=

-

CD74HC4051-EP

www.ti.com

SCLS464A – SEPTEMBER 2002 – REVISED JANUARY 2015

Typical Application (continued)

When calculating the maximum allowable resistance, it is important to ensure that the maximum allowable rise

time (tr = 500 ns) at the HC input is not exceeded. Equation 4 then applies:

where

•

C is the total load capacitance in the circuit

(4)

C is composed of the output capacitance of the driving gate (approximately 10 pF), the total input capacitances

of gates to be driven (approximately 5 pF each), and the line capacitance (approximately 1 pF/cm). The actual

value is calculated by solving the equation for Rp:

(5)

Assuming the total capacitance, C, is 30 pF, the maximum resistor is:

(6)

Faster rise times result in lower impedance and more power consumption. The previous calculation is based on

the assumption that the driving gate has an open collector. Conditions become more satisfactory, however, when

a gate with totem-pole output (that is, SN74ALS00) is used. In that case, the gate output provides the voltage to

be brought up to the value VOH = 2.7 V in less than 10 ns (the rise time of the TTL signal). The pullup resistor

only has to pull the level to 3.5 V within the desired time. According to the previous formula, and with a required

rise time of tr = 50 ns, the resistor is defined by Equation 7:

(7)

The upper limiting value of the resistor is primarily dictated by the rise time required. The larger the resistance,

the longer the rise times and propagation delay times. Reducing the resistance increases speed and power

dissipation.

The other method of accommodating TTL signals to HC circuits is accomplished with special level shifters. This

solution is not recommended because the level shifter itself has no inherent logic functions and increases

component and space requirements.

Copyright © 2002–2015, Texas Instruments Incorporated

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