LTC2483 datasheet(15/20 Pages) LINER

15 / 20 page

LTC2450-1

24501fb

APPLICATIONS INFORMATION

Figure 15. LTC2450-1 Input Drive Equivalent Circuit

elements which reduce the ADC performance sensitivity to

PCBlayoutandexternalcomponents.Nevertheless,thevery

high accuracy of this converter is best preserved by careful

low and high frequency power supply decoupling.

A 0.1μF, high quality, ceramic capacitor in parallel with a

10μF ceramic capacitor should be connected between the

VCC and GND pins, as close as possible to the package.

The 0.1μF capacitor should be placed closest to the ADC

package. It is also desirable to avoid any via in the circuit

path starting from the converter VCC pin, passing through

these two decoupling capacitors and returning to the

converter GND pin. The area encompassed by this circuit

path, as well as the path length, should be minimized.

Very low impedance ground and power planes and star

connections at both VCC and GND pins are preferable. The

VCCpinshouldhavetwodistinctconnections:theﬁrsttothe

decoupling capacitors described above and the second to

the power supply voltage. The GND pin should have three

distinct connections: the ﬁrst to the decoupling capacitors

described above, the second to the ground return for the

input signal source and the third to the ground return for

the power supply voltage source.

Driving VIN

The VIN input drive requirements can be best analyzed

using the equivalent circuit of Figure 15. The input signal

VSIG is connected to the ADC input pin VIN through an

equivalent source resistance RS. This resistor includes

both the actual generator source resistance and any

additional optional resistor connected to the VIN pin. An

optional input capacitor CIN is also connected to the ADC

VIN pin. This capacitor is placed in parallel with the ADC

input parasitic capacitance CPAR. Depending upon the PCB

layout CPAR has typical values between 2pF and 15pF. In

addition, the equivalent circuit of Figure 15 includes the

converter equivalent internal resistor RSW and sampling

capacitor CEQ.

There are some immediate trade-offs in RS and CIN without

needing a full circuit analysis. Increasing RS and CIN can

give the following beneﬁts:

1) Due to the LTC2450-1’s input sampling algorithm, the

input current drawn by VIN during the conversion cycle

is 50nA. A high RS • CIN attenuates the high frequency

components of the input current, and RS values up to

1kΩ result in <1LSB error.

2) The bandwidth from VSIG is reduced at VIN.This band-

width reduction isolates the ADC from high frequency

signals, and as such provides simple antialiasing and

input noise reduction.

3) Noise generated by the ADC is attenuated before it goes

back to the signal source.

4) A large CIN gives a better AC ground at VIN, helping

reduce reﬂections back to the signal source.

5) Increasing RS protects the ADC by limiting the current

during an outside-the-rails fault condition. RS can be

easily sized such as to protect against even extreme

fault conditions.

There is a limit to how large RS • CIN should be for a given

application. Increasing RS beyond a given point increases

the voltage drop across RS due to the input current, to

the point that signiﬁcant measurement errors exist. Ad-

ditionally, for some applications, increasing the RS • CIN

product too much may unacceptably attenuate the signal

at frequencies of interest.

CEQ

0.35pF

(TYP)

RSW

15k

(TYP)

ILEAK

VCC

CIN

VSIG

CPAR

VCC

ICONV

24501 F15

VIN

–

LTC2483 Datasheet(PDF) 15 Page - Linear Technology

LTC2483 Datasheet(HTML) 15 Page - Linear Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL