®

DAC811

6

±12V OPERATION

The DAC811 is fully specified for operation on

±12V power

supplies. However, in order for the output to swing to

±10V,

the power supplies must be

±13.5V or greater. When oper-

ating with

±12VB supplies, the output swing should be

restricted to

±8V in order to meet specifications.

LOGIC INPUT COMPATIBILITY

The DAC811 digital inputs are TTL, LSTTL, and 54/74HC

CMOS-compatible over the operating range of VDD. The

input switching threshold remains at the TLL threshold over

the supply range.

The logic input current over temperature is low enough to

permit driving the DAC811 directly from the outputs of

4000B and 54/74C CMOS devices.

Resistors of 47

Ω should be placed in series with D0 through

D11, WR, NA, NB, NC and LDAC if edges are <10ns or if

the logic input is driven below ground by undershoot.

INSTALLATION

POWER SUPPLY CONNECTIONS

For optimum performance and noise rejection, power supply

decoupling capacitors should be added as shown in Figure 5.

These capacitors (1

µF tantalum recommended) should be

located close to the DAC811.

FIGURE 3. Relationship of Offset and Gain Adjustments

for a Unipolar D/A Converter.

FIGURE 4. Relationship of Offset and Gain Adjustments

for a Bipolar D/A Converter.

TABLE III. Digital Input/Analog Output.

ANALOG OUTPUT

DIGITAL INPUT

0 to +10V

±5V

±10V

111111111111

+9.9976V

+4.9976V

+9.9951V

100000000000

+5V

0V

0V

011111111111

+4.9976V

–0.0024V

–0.0049V

000000000000

0V

–5V

–10V

LSB

2.4mV

2.44mV

4.88mV

MSB

LSB

↓↓

GAIN ADJUSTMENT

For either unipolar or bipolar configurations, apply the

digital input that should give the maximum positive voltage

output. Adjust the gain potentiometer for this positive full

scale voltage. See Table III for positive full scale voltages.

FIGURE 5. Power Supply, Gain, and Offset Potentiometer

Connections.

+ Full Scale

All Bits

Logic 0

1LSB

Range of

Offset Adj.

Offset Adjust Translates the Line

Digital Input

All Bits

Logic 1

Range of

Gain Adjust

Gain Adjust

Rotates the Line

+ Full Scale

All Bits

Logic 0

1LSB

Range of

Offset Adjust

Digital Input

All Bits

Logic 1

Full Scale

Range

Gain Adjust

Rotates the Line

– Full Scale

MSB on All

Others Off

Bipolar V

Offset

Range of

Gain Adjust

Offset Adj.

Translates

the Line

≈ ±0.4%

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

10k

to

100k

Ω

Ω

DD

V

BPO

V

DD

Summing

Junction

V

ACOM

Gain Adjust

DCOM

+V

CC

–V

CC

OUT

1

µF

0.0022

µF

1

µF

3.9M

Ω

1

µF

–V

CC

+V

CC

+V

CC

10k

to

100k

Ω

Ω

–V

CC

1M

Ω

Connect for

Bipolar Operation