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ADS1271IPWR Datasheet(PDF) 3 Page - Texas Instruments

Part # ADS1271IPWR
Description  24-Bit, Wide Bandwidth Analog-to-Digital Converter
PDF  40 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS1271IPWR Datasheet(HTML) 3 Page - Texas Instruments

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ADS1271
SBAS306F − NOVEMBER 2004 − REVISED OCTOBER 2007
www.ti.com
3
ELECTRICAL CHARACTERISTICS
All specifications at TA = −40°C to +105°C, AVDD = +5V, DVDD = +1.8V, fCLK = 27MHz, VREFP = 2.5V, and VREFN = 0V, unless otherwise noted.
Specified values for ADS1271 and ADS1271B (high-grade version) are the same, except where shown in BOLDFACE type.
ADS1271
ADS1271B
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
Analog Inputs
Full-scale input voltage (FSR(1))
VIN = (AINP – AINN)
±VREF
±VREF
V
Absolute input voltage
AINP or AINN to AGND
AGND – 0.1
AVDD + 0.1
AGND – 0.1
AVDD + 0.1
V
Common-mode input voltage
VCM = (AINP + AINN)/2
2.5
2.5
V
Differential
High-Speed mode
16.4
16.4
k
Ω
Differential
input
impedance
High-Resolution mode
16.4
16.4
k
Ω
input
impedance
Low-Power mode
32.8
32.8
k
Ω
DC Performance
Resolution
No missing codes
24
24
Bits
Data rate
High-Speed mode
105,469
105,469
SPS
Data rate
(fDATA)
High-Resolution mode
52,734
52,734
SPS
(fDATA)
Low-Power mode
52,734
52,734
SPS
Integral nonlinearity (INL)
Differential input,
VCM = 2.5V
± 0.0006
± 0.0015
± 0.0006
± 0.0015 %FSR(1)
Offset error
High-Speed mode
Without calibration
0.150
1
0.150
1
mV
Offset error
With calibration
On the level of the noise
Offset drift
1.8
1.8
µV/_C
Gain error
0.1
0.5
0.1
0.5
%FSR(1)
Gain error drift
2
2
ppm/
°C
High-Speed mode
Shorted input
9.0
20
9.0
16
µV, rms
Noise
High-Resolution mode
6.5
6.5
12
µV, rms
Noise
Low-Power mode
9.0
9.0
16
µV, rms
Common-mode rejection
fCM = 60Hz
90
100
95
110
dB
Power-supply
AVDD
f = 60Hz
80
80
dB
Power-supply
rejection
DVDD
f = 60Hz
80
80
dB
AC Performance
Signal-to-noise
(2)
High-Speed mode
99
106
101
106
dB
Signal-to-noise
ratio (SNR) (2)
(unweighted)
High-Resolution mode
109
103
109
dB
ratio (SNR)
(unweighted)
Low-Power mode
106
101
106
dB
Total harmonic distortion (THD)(3)
VIN = 1kHz, −0.5dBFS
−105
−95
−108
−100
dB
Spurious-free dynamic range
−108
−109
dB
Passband ripple
±0.005
±0.005
dB
Passband
0.453 fDATA
0.453fDATA
Hz
−3dB Bandwidth
0.49 fDATA
0.49 fDATA
Hz
Stop band attenuation
100
100
dB
High-Speed mode
0.547fDATA
63.453 fDATA
0.547 fDATA
63.453 fDATA
Hz
Stop band
High-Resolution mode
0.547fDATA
127.453 fDATA
0.547 fDATA
127.453fDATA
Hz
Stop band
Low-Power mode
0.547fDATA
63.453 fDATA
0.547 fDATA
63.453 fDATA
Hz
Group delay
High-Speed and
Low-Power modes
38/fDATA
38/fDATA
s
Group delay
High-Resolution mode
39/fDATA
39/fDATA
s
Settling time
(latency)
High-Speed and
Low-Power modes
Complete settling
76/fDATA
76/fDATA
s
(latency)
High-Resolution mode
Complete settling
78/fDATA
78/fDATA
s
(1) FSR = full-scale range = 2VREF.
(2) Minimum SNR is ensured by the limit of the DC noise specification.
(3) THD includes the first nine harmonics of the input signal.
(4) MODE and FORMAT pins excluded.
(5) See the text for more details on SCLK.



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