ES9016K2M datasheet(37/38 Pages) ESS

37 / 38 page

March 26, 2021

3.2

ES9016K2M Datasheet

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-

8800 • www.esstech.com

ORDERING INFORMATION

Part Number

Description

Package

ES9016K2M

Sabre32® Ultra 32-bit Low Power Stereo Audio DAC

28-pin QFN

The letter K identifies the package type QFN.

Revision History

Rev.

Date

Notes

1.1

March 19, 2014

Update MCLK requirement

1.2

April 15, 2014

Update sync_mode requirement

1.3

May 28, 2014

Update DSD L/R pin assignment. Add THD compensation registers.

Update mechanical drawing and add land pattern. Update migration notes

1.4

June 5, 2014

Added SABRE SOUNDTM trademark

1.5

July 28, 2014

Updated ESS

’ FAX number. Added medical usage legal disclaimer

1.6

August 28, 2014

Added conditions when an external DVDD regulator is required

1.7

September 8, 2014

Corrected typo on Register#7 Bit [6:5], 3’dX changed to 2’dX.

Identified Left and Right channels for Registers #15 and #16 respectively.

Updated DAC output impedance from 781.25

 to 806

1.8

September 24, 2014

Added “8 bit, Read-Write Register, Default = 0x00” heading on Register #21.

Corrected part number on revision marking diagram, page 3.

Removed reference to Right Justified data format that is not supported

1.9

October 16, 2014

Added table to Register #65 description.

2.0

January 8, 2015

Added details on decoupling required for the DVDD core supply.

Deleted old revision history from 0.1 to 0.91.

2.1

April 10, 2015

Added notes on the connection of reserved Bits in the device control

registers.

Added SABRE HiFi logo. Updated ESS’ address and phone number.

2.2

June 10, 2015

Increased typical value of AVCC_L plus AVCC_R from 3mA to 8mA

2.3

December 2, 2016

Correct Recommended Operating Conditions table formatting.

2.4

January 24, 2017

Corrected THD compensation description and Recommended Operating

Conditions table formatting.

2.5

January 31, 2017

Remove references to Revision W silicon, clarify I2C address description.

2.6

February 14, 2017

Added description for Registers #2, #3 and #9. Register #65 labeled as

GPIO Status. Added register map. Adjusted page number references as

needed.

2.7

November 14, 2018

Added Low Power Audio DAC description, removed Advanced Information

2.8

March 13, 2019

Removed ESR capacitor requirement for DVDD. Updated SABRE®, SABRE

SOUND® and Sabre32®

2.9

December 30, 2019

Corrected SDA setup time from SCL rising units from

“µs” to “ns”.

3.0

April 27. 2020

Updated analog performance

3.1

January 7, 2021

Updated I/V converter filter circuit

3.2

March 26, 2021

Updated Register #9 default value

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