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SLG46534 Datasheet(PDF) 39 Page - Renesas Technology Corp

Part # SLG46534
Description  Programmable Mixed-signal Matrix with Asynchronous State Machine
PDF  170 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SLG46534 Datasheet(HTML) 39 Page - Renesas Technology Corp

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© 2025 Renesas Electronics Corporation
Page 38 of 168
SLG46534
Revision 1.21
8.0 Connection Matrix
The Connection Matrix in the SLG46534 is used to create the internal routing for internal functional macrocells of the device once
it is programmed. The registers are programmed from the one-time NVM cell during Test Mode Operation. The output of each
functional macrocell within the SLG46534 has a specific digital bit code assigned to it that is either set to active “High” or inactive
“Low” based on the design that is created. Once the 2048 register bits within the SLG46534 are programmed a fully custom circuit
will be created.
The Connection Matrix has 64 inputs and 110 outputs. Each of the 64 inputs to the Connection Matrix is hard-wired to the digital
output of a particular source macrocell, including IO pins, LUTs, analog comparators, other digital resources, such as VDD and
Ground. The input to a digital macrocell uses a 6-bit register to select one of these 64 input lines.
For a complete list of the SLG46534’s register table, see Section 21.0 Appendix A - SLG46534 Register Definition.
Figure 8. Connection Matrix
Figure 9. Connection Matrix Example
Ground
0
Pin 2 Digital In
1
Pin 3 Digital In
2
Pin 4 Digital In
3
Matrix Input Signal
Functions
N
Resetb_core
62
VDD
63
N
Function
Registers
109
Matrix OUT: PD of
XTAL Osc
reg<877:872>
0
Matrix OUT:
ASM-state0-EN0
reg<5:0>
1
Matrix OUT:
ASM-state0-EN1
reg<13:8>
2
Matrix OUT:
ASM-state0-EN2
reg<21:16>
Matrix Inputs
Matrix Outputs
Pin 10
Pin 9
Pin 11
Connection Matrix
LUT
Pin 10
Pin 9
LUT
Pin 11
Function



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