SDA

SCL-S

SCL

WPP

6

2

7

3

9

8

4

5

1

10

OUT

SET

GND

AVDD

VDD

WPN

DAP

LM8342

SNOSAM0B – NOVEMBER 2005 – REVISED MARCH 2013

www.ti.com

CONNECTION DIAGRAM

Figure 1. 10-Pin SON

Top View

PIN DESCRIPTIONS

Pin Name

Pin #

Function

OUT

1

Current sink output, adjustable in 128 steps. See Application Section for details.

AVDD

2

Analog reference voltage input

WPN

3

Write protect (input)

READ (I2C)

WRITE

→Reg

WRITE

→EE

SCL Switch

WPN = Low

yes

yes

no

open

WPN = High

yes

yes

yes

closed

WPP

4

Inverted WPN (output)

GND

5

Ground

VDD

6

Supply voltage

SDA

7

I2C compatible serial data input/output

SCL

8

I2C compatible serial clock input

SCL-S

9

Switched SCL connection. Serial clock input when WPN is set to high

SET

10

Maximum output current adjustment pin (see block diagram)

DAP

Left floating or connect to GND

4

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