SLG51002

PMIC with High PSRR, Low Noise, Multi-Output LDOs

and Integrated Load Switches

Datasheet

Revision 3.11

25-Jul-2023

CFR0011-120-00

20 of 36

© 2023 Renesas Electronics Corporation

Parameter

Description

Conditions

Min

Typ

Max

Unit

VN

Output noise

f = 10 Hz to 100 kHz

IOUT = IOUT_MAX/2

152

μV

Current Sink

IOV_SINK

Current sink at over-voltage

VOV = VOUT + 100 mV

Note 10

10

77

mA

Quiescent Current Specifications

IQ_ON_0mA

Quiescent current

IOUT = 0 mA

VDD = VIN = 3.8 V

Note 11

13

19

μA

IQ_ON_1mA

Quiescent current LDO1, 2

IOUT = 1 mA

Note 11

36

48

μA

Quiescent current LDO3

IOUT = 1 mA

Note 11

44

56

IQ_ON_IMAX

Quiescent current LDO1, 2

IOUT = IOUT_MAX

Note 11

1.7

3.5

mA

Quiescent current LDO3

IOUT = IOUT_MAX

Note 11

2

3.7

mA

Note 1

Guaranteed for LDO1 and LDO2 for VIN > 2.1 V. Between VIN of 1.7 V to 2.1 V, the IOUT_MAX guaranteed is

200 mA. Guaranteed for LDO3 for VIN > 2.1 V. Between VIN of 1.7 V to 2.1 V, the IOUT_MAX guaranteed is 300

mA.

Note 2

Slew rate

≥ 25mV/us is guaranteed for Cout ≤ 4.7uF

Note 3

Accuracy ±30%, IOUT_LIM > 100 mA

Note 4

The overall accuracy can be calculated by summing VOUT_PP + VOUT_TEMP + VOUT_STATIC_LD + VOUT_STATIC_LINE.

Note 5

+10 mV / -10 mV accuracy applies to factory-trimmed VOUT values targeted between 1.23 V to 3.72 V.

VOUT targets from 1.20 V to 1.22 V can be trimmed to +24 mV/ -10 mV accuracy. VOUT targets from 3.73

V to 3.75 V can be trimmed to +10 mV / -30 mV accuracy

Note 6

Guaranteed for VIN

≥ 2.5 V.

Note 7

Dropout voltage is linear for the same VIN voltage with the load current, if using a lower IOUT_MAX than

specified.

Note 8

Guaranteed for VIN > 2.1 V. Otherwise, maximum line transient is 20 mV.

Note 9

For slew rate set at 100 mV/us, VOUT = 3.3 V

Note 10 Guaranteed for VIN > 2.35 V.

Note 11 Internal regulator current flowing to ground.

Note 12 Strongly related to trace parasitic inductance, COUT & ESL