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SLG51002 Datasheet(PDF) 22 Page - Renesas Technology Corp |
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SLG51002 Datasheet(HTML) 22 Page - Renesas Technology Corp |
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22 / 37 page ![]() SLG51002 PMIC with High PSRR, Low Noise, Multi-Output LDOs and Integrated Load Switches Datasheet Revision 3.11 25-Jul-2023 CFR0011-120-00 22 of 36 © 2023 Renesas Electronics Corporation Parameter Description Conditions Min Typ Max Unit VOUT_TEMP Temperature dependence of VOUT Note 4 IOUT = 1 mA Note 6 -0.65 0.65 % VOUT_STATIC_ LINE Static line regulation Note 4 IOUT = 1 mA VIN = VOUT + VDROPOUT (Max) to VIN (Max) 3 mV VOUT_STATIC_ LD Static load regulation Note 4 1 mA < IOUT < IOUT_MAX -8 3 mV VDROPOUT Dropout voltage @ VOUT = VOUT (VIN (Max)) - 10 mV IOUT = IOUT_MAX Note 7 130 mV RPD_OFF_ACC Output pull down resistance accuracy VOUT = 0.5 V LDO disabled 30 % Dynamic Parameters VOUT_TR_LINE Line transient response VIN = VOUT + VDROPOUT (Max) + 0.6 V to VIN = VOUT + VDROPOUT (Max) VOUT = VOUT (Typ) IOUT = IOUT_MAX tR = tF = 100 mV/μs 6 mV VOUT_TR_LD_1 mA Load transient response VIN = VOUT + VDROPOUT (Max) VOUT = VOUT (Typ) IOUT = 1 mA to IOUT_MAX/2 tR = tF = 1 μs 30 mV tON Turn-on time Time to 90 % of VOUT IOUT = 0 mA Note 8 0.15 ms tOFF Turn-off time Time to 10 % of VOUT IOUT = 0 mA RPD_OFF=100Ohm 0.8 ms |
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