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EXAMPLE BOARD LAYOUT

0.07 MAX

ALL AROUND

0.07 MIN

ALL AROUND

(4.57)

2X (1.3)

2X (2.15)

(5.7)

(5.5)

(2.285)

(4.38)

(R0.05) TYP

TO-252 - 2.55 mm max height

NDP0003B

TRANSISTOR OUTLINE

4219870/A 03/2018

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature numbers

SLMA002(www.ti.com/lit/slm002) and SLMA004 (www.ti.com/lit/slma004).

5. Vias are optional depending on application, refer to device data sheet. It is recommended that vias under paste be filled, plugged or tented.

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE: 8X

SYMM

PKG

1

3

4

SEE SOLDER MASK

DETAIL

EXPOSED

METAL

METAL EDGE

SOLDER MASK

OPENING

NON SOLDER MASK

DEFINED

(PREFERRED)

SOLDER MASK DETAIL

EXPOSED

METAL

METAL UNDER

SOLDER MASK

SOLDER MASK

OPENING

SOLDER MASK DEFINED