LMP91002

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SNIS163B – APRIL 2012 – REVISED OCTOBER 2015

6.5 Electrical Characteristics

Unless otherwise specified, all limits ensured for TA = 25°C, VS= (VDD – AGND), VS= 3.3 V and AGND = DGND = 0 V, VREF =

2.5 V, Internal Zero = 20% VREF.

(1)

PARAMETER

TEST CONDITIONS

MIN(2)

TYP(3)

MAX(2)

UNIT

POWER SUPPLY SPECIFICATION

TA = 25ºC

10

13.5

3-lead amperometric cell

mode

At the temperature

15

MODECN = 0x03

extremes

TA = 25ºC

6.5

8

Standby mode

IS

Supply current

µA

At the temperature

MODECN = 0x02

10

extremes

TA = 25ºC

0.6

0.85

Deep sleep mode

At the temperature

MODECN = 0x00

1

extremes

POTENTIOSTAT

TA = 25ºC

–90

90

VDD = 2.7 V;

At the temperature

Internal zero 50% VDD

–800

800

extremes

IRE

Input bias current at RE pin

pA

TA = 25ºC

–90

90

VDD = 3.6 V;

At the temperature

Internal zero 50% VDD

–900

900

extremes

Sink

750

Minimum operating current

µA

capability

Source

750

ICE

Sink

10

Minimum charging

mA

capability(4)

Source

10

TA = 25ºC

120

Open-loop voltage gain of

300 mV

≤ VCE ≤

AOL_A1

control loop operational

Vs – 300 mV, –750 µA

≤

dB

At the temperature

104

amplifier (A1)

ICE

≤ 750 µA

extremes

Low frequency integrated

en_RW

noise between RE pin and

0.1 Hz to 10 Hz(5)

3.4

µVpp

WE pin

0% VREF, internal zero = 20% VREF,

–550

550

at the temperature extremes

WE voltage offset referred to

0% VREF, internal zero = 50% VREF,

VOS_RW

–550

550

µV

RE

at the temperature extremes

0% VREF, internal zero = 67% VREF,

–550

550

at the temperature extremes

0% VREF, internal zero = 20% VREF

–4

4

WE voltage offset drift

TcVOS_RW

referred to RE from –40°C to

0% VREF, internal zero = 50% VREF

–4

4

µV/°C

85°C(6)

0% VREF, internal zero = 67% VREF

–4

4

(1)

Electrical Table values apply only for factory testing conditions at the temperature indicated. Factory testing conditions result in very

limited self-heating of the device such that TJ = TA. No ensured specification of parametric performance is indicated in the electrical

tables under conditions of internal self-heating where TJ > TA. Absolute Maximum Ratings indicate junction temperature limits beyond

which the device may be permanently degraded, either mechanically or electrically.

(2)

Limits are 100% production tested at 25°C. Limits over the operating temperature range are ensured through correlations using

statistical quality control (SQC) method.

(3)

Typical values represent the most likely parametric norm as determined at the time of characterization. Actual typical values may vary

over time and will also depend on the application and configuration. The typical values are not tested and are not ensured on shipped

production material.

(4)

At such currents no accuracy of the output voltage can be expected.

(5)

This parameter includes both A1 and TIA's noise contribution.

(6)

Offset voltage temperature drift is determined by dividing the change in VOS at the temperature extremes by the total temperature

change.Starting from the measured voltage offset at temperature T1 (VOS_RW(T1)), the voltage offset at temperature T2 (VOS_RW(T2)) is

calculated according the following formula: VOS_RW(T2)=VOS_RW(T1)+ABS(T2–T1)* TcVOS_RW.

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