xx

xx

xx

xx

xx

xx

C1

C3

B2

A1

A3

RPG

CIN

COUT

VIN

VOUT

GND

VEN

GND

Power

Good

CIN

COUT

VOUT

GND

Power

Good

VIN

GND

VEN

RPG

1

2

3

4

5

LP3988

SNVS161E – OCTOBER 2001 – REVISED OCTOBER 2015

www.ti.com

11.2 Layout Examples

Figure 17. LP3988 SOT-23 Layout Example

Figure 18. LP3988 DSBGA Layout Example

11.3 DSBGA Mounting

The DSBGA package requires specific mounting techniques, which are detailed in TI Application Note AN-1112

DSBGA Wafer Level Chip Scale Package (SNVA009). For best results during assembly, alignment ordinals on

the PC board may be used to facilitate placement of the DSBGA device.

16

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