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S25FL256SDPNFVC Datasheet(PDF) 3 Page - Cypress Semiconductor |
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S25FL256SDPNFVC Datasheet(HTML) 3 Page - Cypress Semiconductor |
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3 / 149 page ![]() Document Number: 001-98283 Rev. *M Page 3 of 146 S25FL128S/S25FL256S Performance Summary Maximum Read Rates with the Same Core and I/O Voltage (VIO = VCC = 2.7V to 3.6V) Command Clock Rate (MHz) Mbytes/s Read 50 6.25 Fast Read 133 16.6 Dual Read 104 26 Quad Read 104 52 Maximum Read Rates with Lower I/O Voltage (VIO = 1.65V to 2.7V, VCC = 2.7V to 3.6V) Command Clock Rate (MHz) Mbytes/s Read 50 6.25 Fast Read 66 8.25 Dual Read 66 16.5 Quad Read 66 33 Maximum Read Rates DDR (VIO = VCC = 3V to 3.6V) Command Clock Rate (MHz) Mbytes/s Fast Read DDR 80 20 Dual Read DDR 80 40 Quad Read DDR 80 80 Typical Program and Erase Rates Operation kbytes/s Page Programming (256-byte page buffer - Hybrid Sector Option) 1000 Page Programming (512-byte page buffer - Uniform Sector Option) 1500 4-kbyte Physical Sector Erase (Hybrid Sector Option) 30 64-kbyte Physical Sector Erase (Hybrid Sector Option) 500 256-kbyte Logical Sector Erase (Uniform Sector Option) 500 Current Consumption Operation Current (mA) Serial Read 50 MHz 16 (max) Serial Read 133 MHz 33 (max) Quad Read 104 MHz 61 (max) Quad DDR Read 80 MHz 90 (max) Program 100 (max) Erase 100 (max) Standby 0.07 (typ) |
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