AM53C96KC datasheet(24/63 Pages) AMD

24 / 63 page

P R E L I M I N A R Y

AMD

Am53C94/Am53C96

Target Selected without ATN Steps

Internal State

Interrupt Status

Explanation

Bits 2:0 (Hex)

Bits 7:0 (Hex)

Selected; received entire CDB; check group code valid bit; initiator asserted ATN

in command phase

Sequence halted in command phase due to parity error; some CDB bytes may

not have been received; check FIFO flags; initiator asserted ATN in command

phase

Selected; received entire CDB; check group code valid bit

Sequence halted in command phase because of parity error; some CDB bytes

may not have been received; check FIFO flags

Selected; loaded bus ID into FIFO; null–byte message loaded into FIFO

Target Select with ATN Steps, SCSI–2 Bit NOT SET

Internal State

Interrupt Status

Explanation

Bits 2:0 (Hex)

Bits 7:0 (Hex)

Selection complete; received one message byte and entire CDB; initiator as-

serted ATN during command phase

Halted in command phase; parity error and ATN true

Selected with ATN; stored bus ID and one message byte; sequence halted be-

cause ATN remained true after first message byte

Selection completed; received one message byte and the entire CDB

Sequence halted in command phase because of parity error; some CDB bytes

not received; check group code valid bit and FIFO flags

Selected with ATN; stored bus ID and one message byte; sequence halted be-

cause of parity error or invalid ID message

Target Select with ATN Steps, SCSI–2 Bit SET

Internal State

Interrupt Status

Explanation

Bits 2:0 (Hex)

Bits 7:0 (Hex)

Halted in command phase; parity error and ATN true

ATN remained true after third message byte

Selected with ATN; stored bus ID and one message byte; sequence halted be-

cause of parity error or invalid ID message

Selection completed; received three message bytes and the entire CDB

Received three message bytes then halted in command phase because of parity

error; some CDB bytes not received; check group code valid bit and FIFO flags

402Parity error during second or third message byte

Target Receive Command Steps

Internal State

Interrupt Status

Explanation

Bits 2:0 (Hex)

Bits 7:0 (Hex)

Received entire CDB; initiator asserted ATN

Sequence halted during command transfer due to parity error; ATN asserted by

initiator

Received entire CDB

Sequence halted during command transfer due to parity error; check FIFO flags

Target Disconnect Steps

Internal State

Interrupt Status

Explanation

Bits 2:0 (Hex)

Bits 7:0 (Hex)

Disconnect steps fully executed; disconnected; bus is free

Two message bytes sent; sequence halted because initiator asserted ATN

One message byte sent; sequence halted because initiator asserted ATN

AM53C96KC Datasheet(PDF) 24 Page - Advanced Micro Devices

AM53C96KC Datasheet(HTML) 24 Page - Advanced Micro Devices

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