1

2

3

7

4

5

6

14

13

12

8

11

10

9

1D

1CLK

1PRE

1Q

1Q

GND

2CLR

2D

2CLK

2PRE

2Q

VCC

2Q

1CLR

3

SN74HC74-Q1

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SCLS577B – MARCH 2004 – REVISED APRIL 2020

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5 Pin Configuration and Functions

D or PW Package

14-Pin SOIC or TSSOP

Top View

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

1CLR

1

Input

Channel 1, Clear Input, Active Low

1D

2

Input

Channel 1, Data Input

1CLK

3

Input

Channel 1, Positive edge triggered clock input

1PRE

4

Input

Channel 1, Preset Input, Active Low

1Q

5

Output

Channel 1, Output

1Q

6

Output

Channel 1, Inverted Output

GND

7

—

Ground

2Q

8

Output

Channel 2, Inverted Output

2Q

9

Output

Channel 2, Output

2PRE

10

Input

Channel 2, Preset Input, Active Low

2CLK

11

Input

Channel 2, Positive edge triggered clock input

2D

12

Input

Channel 2, Data Input

2CLR

13

Input

Channel 2, Clear Input, Active Low

VCC

14

—

Positive Supply

(1)

Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2)

The input and output voltage ratings may be exceeded if the input and output current ratings are observed.

(3)

Guaranteed by design.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

VCC

Supply voltage

–0.5

7

V

IIK

Input clamp current(2)

VI < 0 or VI > VCC

±20

mA

IOK

Output clamp current(2)

VO < 0 or VO > VCC

±20

mA

IO

Continuous output current

VO = 0 to VCC

±25

mA

Continuous current through VCC or GND

±50

mA

TJ

Junction temperature(3)

150

°C

Tstg

Storage temperature

–65

150

°C