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X25330AF Datasheet(PDF) 1 Page - IC MICROSYSTEMS

Part # X25330AF
Description  5MHz SPI Serial E2 PROM with Block Lock Protection
PDF  14 Pages
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Manufacturer  ICMIC [IC MICROSYSTEMS]
Direct Link  http://www.icmic.com
Logo ICMIC - IC MICROSYSTEMS

X25330AF Datasheet(HTML) 1 Page - IC MICROSYSTEMS

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5MHz SPI Serial E
2
PROM with Block Lock
TM
Protection
32K
4K x 8 Bit
©
Xicor, Inc. 1994 - 1997 Patents Pending
1
Characteristics subject to change without notice
7048–1.0 6/18/97 T0/C0/D0 SH
X25330
FEATURES
•5MHz Clock Rate
•Low Power CMOS
<1µA Standby Current
<5mA Active Current
•2.5V To 5.5V Power Supply
•SPI Modes (0,0 & 1,1)
•4K X 8 Bits
32 Byte Page Mode
•Block Lock™ Protection
Protect 1/4, 1/2 or all of E
2PROM Array
•Programmable Hardware Write Protection
In-Circuit Programmable ROM Mode
•Built-in Inadvertent Write Protection
Power-Up/Down protection circuitry
Write Enable Latch
Write Protect Pin
•Self-Timed Write Cycle
5ms Write Cycle Time (Typical)
•High Reliability
Endurance: 100,000 cycles
Data Retention: 100 Years
ESD protection: 2000V on all pins
•Packages
8-Lead SOIC
14-Lead TSSOP
DESCRIPTION
The X25330 is a CMOS 32K-bit serial E
2
PROM, internally
organized as 4K x 8. The X25330 features a
Serial Peripheral Interface (SPI) and software protocol
allowing operation on a simple three-wire bus. The bus
signals are a clock input (SCK) plus separate data in (SI)
and data out (SO) lines. Access to the device is
controlled through a chip select (CS) input, allowing any
number of devices to share the same bus.
The X25330 also features two additional inputs that
provide the end user with added flexibility. By
asserting the HOLD input, the X25330 will ignore tran-
sitions on its inputs, thus allowing the host to service
higher priority interrupts. The WP input can be used as a
hardwire input to the X25330 disabling all write
attempts to the status register, thus providing a mech-
anism for limiting end user capability of altering 0, 1/4,
1/2 or all of the memory.
The X25330 utilizes Xicor’s proprietary Direct Write
TM cell,
providing a minimum endurance of 100,000
cycles and a minimum data retention of 100 years.
COMMAND
DECODE
AND
CONTROL
LOGIC
WRITE
CONTROL
AND
TIMING
LOGIC
WRITE
PROTECT
LOGIC
X DECODE
LOGIC
4K BYTE
ARRAY
32 X 256
Y DECODE
DATA REGISTER
SO
SI
SCK
CS
HOLD
WP
32
64
8
32
STATUS
REGISTER
32
64 X 256
32 X 256
7037 FRM F01
Direct Write
TM and Block LockTM Protection is a trademark of Xicor, Inc.
FUNCTIONAL DIAGRAM
This X25330 device has been acquired by
IC MICROSYSTEMS from Xicor, Inc.
ICmic
IC MICROSYSTEMS
TM


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