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TLC320AD50C/I Datasheet(PDF) 9 Page - Texas Instruments |
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TLC320AD50C/I Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 54 page ![]() 1–2 1.2 Functional Block Diagram INM INP Sigma -Delta ADC Decimation Filter Buffer Digital Loopback AUXP AUXM Vref DOUT OUTP OUTM Sigma -Delta DAC Interpolation Filter Buffer DIN I/O Control MCLK SCLK MONOUT M/S FSD ALTDATA FC FS Internal Clock Circuit PLL (x4) Low Pass Filter ÷N FLAG Analog Loopback MUX RESET PWRDWN FILT REFP REFM PGA PGA MUX PGA DVSS DVDD AVDD(PLL) AVSS(PLL) AVSS AVDD NOTE: Pin numbers shown are for the DW package. 5 6 3 4 23 24 16 15 28 18 10 9 7 8 26 25 27 11 1 2 12 22 21 14 17 20 19 13 |
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