PIC16F570 datasheet(16/129 Pages) MICROCHIP

16 / 129 page

PIC16F570

DS40001684E-page 16

 2013-2014 Microchip Technology Inc.

Bank 2/6

N/A

W(2)

Working Register (W)

xxxx xxxx

N/A

TRIS

I/O Control Registers (TRISA, TRISB, TRISC)

1111 1111

N/A

OPTION

Contains control bits to configure Timer0 and Timer0/WDT prescaler

1111 1111

N/A

BSR(2)

—

BSR2

BSR1

BSR0

---- -000

---- -uuu

40h

INDF

Uses contents of FSR to address data memory (not a physical register)

xxxx xxxx

uuuu uuuu

41h

TMR0

Timer0 module Register

xxxx xxxx

uuuu uuuu

42h

PCL(1)

Low-order eight bits of PC

1111 1111

43h

STATUS(2)

PA2

PA1

PA0

ZDC

0001 1xxx

000q qqqq

44h

FSR(2)

Indirect data memory Address Pointer

xxxx xxxx

uuuu uuuu

45h

OSCCAL

CAL6

CAL5

CAL4

CAL3

CAL2

CAL1

CAL0

—

1111 111-

uuuu uuu-

46h

PORTA

RA7

RA6

RA5

RA4

RA3

RA2

RA1

RA0

xxxx xxxx

uuuu uuuu

47h

PORTB

RB7

RB6

RB5

RB4

RB3

RB2

RB1

RB0

xxxx xxxx

uuuu uuuu

48h

PORTC

RC7

RC6

RC5

RC4

RC3

RC2

RC1

RC0

xxxx xxxx

uuuu uuuu

49h

ADCON0

ADCS1

ADCS0

CHS3

CHS2

CHS1

CHS0

GO/DONE

ADON

1111 1100

4Ah

ADRES

ADC Conversion Result

xxxx xxxx

uuuu uuuu

4Bh

INTCON0

ADIF

CWIF

T0IF

RBIF

—

GIE

0000 ---0

Bank 3/7

N/A

W(2)

Working Register (W)

xxxx xxxx

N/A

TRIS

I/O Control Registers (TRISA, TRISB, TRISC)

1111 1111

N/A

OPTION

Contains control bits to configure Timer0 and Timer0/WDT prescaler

1111 1111

N/A

BSR(2)

—

BSR2

BSR1

BSR0

---- -000

---- -0uu

60h

INDF

Uses contents of FSR to address data memory (not a physical register)

xxxx xxxx

uuuu uuuu

61h

IW(3)

Interrupt Working Register. (Addressed also as W register when within ISR)

xxxx xxxx

62h

PCL(1)

Low-order eight bits of PC

1111 1111

63h

STATUS(2)

PA2

PA1

PA0

ZDC

0001 1xxx

000q qqqq

64h

FSR(2)

Indirect data memory Address Pointer

xxxx xxxx

uuuu uuuu

65h

INTCON1

ADIE

CWIE

T0IE

RBIE

—

WUR

0000 ---0

66h

ISTATUS(3)

PA2

PA1

PA0

ZDC

xxxx xxxx

000q qqqq

67h

IFSR(3)

Indirect data memory Address Pointer

xxxx xxxx

uuuu uuuu

68h

IBSR(3)

—

BSR2

BSR1

BSR0

---- -xxx

---- -uuu

69h

OPACON

—

—OPA2ON

OPA1ON

---- --00

6Ah

ANSEL

ANS7

ANS6

ANS5

ANS4

ANS3

ANS2

ANS1

ANS0

1111 1111

6Bh

INTCON0

ADIF

CWIF

T0IF

RBIF

—

GIE

0000 ---0

TABLE 4-1:

SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on

POR/BOR

Value on all

other Resets

Legend:

x = unknown, u = unchanged, – = unimplemented, read as ‘0’ (if applicable), q = value depends on condition.

Shaded cells = unimplemented or unused

Note 1:

The upper byte of the Program Counter is not directly accessible. See Section 4.6 “Program Counter” for an explanation of how to access these

bits.

Registers are implemented as two physical registers. When executing from within an ISR, a secondary register is used at the same logical

location. Both registers are persistent. See Section 8.11 “Interrupts”.

These registers show the contents of the registers in the other context: ISR or main line code. See Section 8.11 “Interrupts”.

PIC16F570 Datasheet(PDF) 16 Page - Microchip Technology

PIC16F570 Datasheet(HTML) 16 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL