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TLE2142 Datasheet(PDF) 9 Page - Texas Instruments |
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TLE2142 Datasheet(HTML) 9 Page - Texas Instruments |
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9 / 26 page ![]() TYPICAL CHARACTERISTICS TLE2142-Q1 www.ti.com....................................................................................................................................................................................................... SLOS628 – JULY 2009 Table of Graphs VIO Input offset voltage Distribution Figure 1 IIO Input offset current vs Free-air temperature Figure 2 vs Common-mode input voltage Figure 3 IIB Input bias current vs Free-air temperature Figure 4 vs Supply voltage Figure 5 vs Free-air temperature Figure 6 VOM+ Maximum positive peak output voltage vs Output current Figure 7 vs Settling time Figure 9 vs Supply voltage Figure 5 vs Free-air temperature Figure 6 VOM– Maximum negative peak output voltage vs Output current Figure 8 vs Settling time Figure 9 VO(PP) Maximum peak-to-peak output voltage vs Frequency Figure 10 VOH High-level output voltage vs Output current Figure 11 VOL Low-level output voltage vs Output current Figure 12 Phase shift vs Frequency Figure 13 vs Frequency Figure 13 AVD Large-signal differential voltage amplification vs Free-air temperature Figure 14 zo Closed-loop output impedance vs Frequency Figure 15 IOS Short-circuit output current vs Free-air temperature Figure 16 vs Frequency Figure 17 CMRR Common-mode rejection ratio vs Free-air temperature Figure 18 vs Frequency Figure 19 kSVR Supply-voltage rejection ratio vs Free-air temperature Figure 20 vs Supply voltage Figure 21 ICC Supply current vs Free-air temperature Figure 22 Vn Equivalent input noise voltage vs Frequency Figure 23 Vn Input noise voltage Over a 10-second period Figure 24 In Noise current vs Frequency Figure 25 THD+N Total harmonic distortion plus noise vs Frequency Figure 26 vs Free-air temperature Figure 27 SR Slew rate vs Load capacitance Figure 28 Noninverting large signal vs Time Figure 29 Pulse response Inverting large signal vs Time Figure 30 Small signal vs Time Figure 31 B1 Unity-gain bandwidth vs Load capacitance Figure 32 Gain margin vs Load capacitance Figure 33 φ m Phase margin vs Load capacitance Figure 34 Copyright © 2009, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TLE2142-Q1 |
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