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TLV522 Datasheet(PDF) 14 Page - Texas Instruments |
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TLV522 Datasheet(HTML) 14 Page - Texas Instruments |
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14 / 22 page ![]() V- OUTB OUTA V+ -INA +INA +INB -INB GND RG VOUTA VIN Place components close to device and to each other to reduce parasitic error Run the input traces as far away from the supply lines as possible GND VS- Place low-ESR ceramic bypass capacitor close to device GND Place low-ESR ceramic bypass capacitor close to device 14 TLV522 SNOSD27 – MAY 2016 www.ti.com Product Folder Links: TLV522 Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 9 Power Supply Recommendations The TLV522 is specified for operation from 1.7 V to 5.5 V (±0.85 V to ±2.75 V) over a –40°C to 125°C temperature range. Parameters that can exhibit significant variance with regard to operating voltage or temperature are presented in the Typical Characteristics. CAUTION Supply voltages larger than 6 V can permanently damage the device. For proper operation, the power supplies must be properly decoupled. For decoupling the supply lines it is suggested that 10 nF capacitors be placed as close as possible to the operational amplifier power supply pins. For single supply, place a capacitor between V+ and V– supply leads. For dual supplies, place one capacitor between V+ and ground, and one capacitor between V– and ground. If your application expects signals above (> 1 kHz) we recommend you use extra supply filtering. Extra filtering on the power supply input is recommended when presence of signals with frequency above one kHz (> 1 kHz) on the line is expected. Example of such signal sources are high-frequency switching supplies. 10 Layout 10.1 Layout Guidelines The V+ pin should be bypassed to ground with a low ESR capacitor. The optimum placement is closest to the V+ and ground pins. Care should be taken to minimize the loop area formed by the bypass capacitor connection between V+ and ground. The ground pin should be connected to the PCB ground plane at the pin of the device. The feedback components should be placed as close to the device as possible to minimize strays. There is an internal electrical connection between the exposed Die Attach Pad (DAP) and the V– pin. For best performance the DAP should be connected to the exact same potential as the V– pin. Do not use the DAP as the primary V– supply. Floating the DAP pad is not recommended. The DAP and V– pin should be joined directly as shown in the Layout Example. 10.2 Layout Example Figure 26. Layout Example (Top View) |
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