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TPS2145IPWPR Datasheet(PDF) 4 Page - Texas Instruments

Part # TPS2145IPWPR
Description  LDO AND DUAL SWITCH WITH CONTROLLED RISE TIMES FOR DSP AND PORTABLE APPLICATIONS
PDF  34 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

TPS2145IPWPR Datasheet(HTML) 4 Page - Texas Instruments

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TPS2145, TPS2147
TPS2155, TPS2157
SLVS333 − AUGUST 2001
4
www.ti.com
electrical characteristics over recommended operating junction-temperature range,
2.9 V
≤ VI(VIN/SWIN1) ≤ 5.5 V, 2.9 V ≤ VI(SWIN2) ≤ 5.5 V, VI(ENx) = 0 V or VI(ENx) = 5 V,
VI(LDO_EN) = 5 V, TJ = −40°C to 100°C (unless otherwise noted)
power switches
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
rDS(on)
Static drain-source on-state resistance,
TJ = −40°C to 100°C,
IO(LDO_OUT) = 200 mA,
IOUT1 and IOUT2 = 150 mA
580
m
rDS(on)
Static drain-source on-state resistance,
VIN/SWIN1 or SWIN2 to OUTx
TJ = 25°C,
IO(LDO_OUT) = 200 mA,
IOUT1 and IOUT2 = 150 mA
340
m
VI(ENx) = 5 V,
VI(ENx) = 0 V,
SWIN2 floating,
VI(VIN/SWIN1) = 5 V
10
Ilkg(R)
Reverse leakage current at OUTx
VO(OUTx) = 5 V,
LDO_EN = don’t care
VI(ENx) = 5 V,
VI(ENx) = 0 V,
VI(SWIN2) = 0,
VI(VIN/SWIN1) = 2.9 V
10
µA
VI(ENx) = 5 V,
VI(ENx) = 0 V,
VI(SWIN2) = 0,
VI(VIN/SWIN1) = 0 V
10
IOS
Short circuit output current
OUTx connected to GND, device enabled into short
circuit
0.2
0.4
A
Delay time for asserting OC flag
From IOUTx at 95% of current limit level to 50% OC
5.5
ms
Delay time for deasserting OC flag
From IOUTx at 95% of current limit level to 50% OC
10.5
ms
timing parameters, power switches
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ton
Turnon time, OUTx switch, (see Note 1)
CL = 100 µF
RL = 33 Ω
0.5
6
ton
Turnon time, OUTx switch, (see Note 1)
CL = 1 µF
RL = 33 Ω
0.1
3
toff
Turnoff time, OUTx switch (see Note 1)
CL = 100 µF
RL = 33 Ω
5.5
12
ms
toff
Turnoff time, OUTx switch (see Note 1)
CL = 1 µF
RL = 33 Ω
0.05
4
ms
tr
Rise time, OUTx switch (see Note 1)
CL = 100 µF
RL = 33 Ω
0.5
5
tr
Rise time, OUTx switch (see Note 1)
CL = 1 µF
RL = 33 Ω
0.1
2
tf
Fall time, OUTx switch (see Note 1)
CL = 100 µF
RL = 33 Ω
5.5
9
tf
Fall time, OUTx switch (see Note 1)
CL = 1 µF
RL = 33 Ω
0.05
1.2
NOTE 1. Specified by design, not tested in production.
undervoltage lockout at VIN/SWIN1
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
UVLO Threshold
2.2
2.85
V
Hysteresis (see Note 1)
260
mV
Deglitch (see Note 1)
50
µs
NOTE 1. Specified by design, not tested in production.



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