IP1000A LF
Preliminary Data Sheet
32/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
BcstFramesXmtdOk reaches a value of 0xC000.
BcstFramesXmtdOk is enabled by writing a logic 1
to the StatisticsEnable bit in the MACCtrl register,
and a logic 0 to the BcstFramesXmtdOk bit within
the StatisticsMask register.
3.2.1.3
BcstOctetRcvOk
Class............................. Ethernet MIB Statistics
I/O Base Address ......... IoBaseAddress register value
Memory Base Address . MemBaseAddress register value
Address Offset .............. 0xB0
Default Value ................ 0x00000000
Access Rule.................. Double Word
Width ............................ 32 bits
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
31..0
BcstOctetRcvOk
Broadcast Octets Received OK is the count of the
number of data and padding octets in frames, with
destination address
equal
to
the broadcast
address
(0xFFFFFFFFFFFF),
that
are
successfully received. BcstOctetRcvOk does not
include frames received with frames too long,
FCS, length or alignment errors, or frames lost
due to internal MAC sublayer error (i.e. overrun).
BcstOctetRcvOk will wrap around to zero after
reaching 0xFFFFFFFF.
All IP1000A LF byte and octet count based
statistic registers include the VLAN tag (4 octets)
regardless of whether or not the IP1000A LF is
adding (on frame transmission) or removing (on
frame reception) the VLAN tag automatically. An
UpdateStats interrupt (UpdateStats bit within the
IntStatus
register)
will
occur
when
BcstOctetRcvOk reaches a value of 0xC0000000.
BcstOctetRcvOk is enabled by writing a logic 1 to
the StatisticsEnable bit in the MACCtrl register,
and a logic 0 to the BcstOctetRcvOk bit within the
StatisticsMask register.
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