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IP1000ALF-DS-R07 Datasheet(PDF) 42 Page - List of Unclassifed Manufacturers

Part # IP1000ALF-DS-R07
Description  Gigabit Ethernet NIC Single Chip
PDF  75 Pages
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Manufacturer  ETC2 [List of Unclassifed Manufacturers]
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IP1000ALF-DS-R07 Datasheet(HTML) 42 Page - List of Unclassifed Manufacturers

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IP1000A LF
Preliminary Data Sheet
42/75
July 5, 2005
Copyright © 2005, IC Plus Corp.
IP1000A LF-DS-R08
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
MACCtrl
register,
and
a
logic
0
to
the
McstFramesRcvdOk bit within the StatisticsMask
register.
3.2.1.19 McstFramesXmtdOk
Class............................. Ethernet MIB Statistics
I/O Base Address ......... IoBaseAddress register value
Memory Base Address . MemBaseAddress register value
Address Offset .............. 0xE0
Default Value ................ 0x00000000
Access Rule.................. Double Word
Width ............................ 32 bits
Bit
BIT Name
BIT Description
Type
HW
Reset
SW
Reset
31..0
McstFramesXmtd
Ok
Multicast Frames Transmitted OK is a count of the
number
of
frames
that
are
successfully
transmitted to a group destination address other
than the broadcast address (0xFFFFFFFFFFFF).
McstFramesXmtdOk will wrap around to zero after
reaching 0xFFFFFFFF. See IEEE 802.3 Clause
30.3.1.1.18.
An UpdateStats interrupt (UpdateStats bit within
the
IntStatus
register)
will
occur
when
McstFramesXmtdOk
reaches
a
value
of
0xC0000000. McstFramesXmtdOk is enabled by
writing a logic 1 to the StatisticsEnable bit in the
MACCtrl
register,
and
a
logic
0
to
the
McstFramesXmtdOk bit within the StatisticsMask
register.
R/W



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