CD74HC40103EP

HIGHSPEED CMOS LOGIC

8STAGE SYNCHRONOUS DOWN COUNTER

SCLS548 − DECEMBER 2003

6

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

switching characteristics over recommended operating free-air temperature range (unless

otherwise noted) (see Figure 1)

PARAMETER

FROM

TO

LOAD

VCC

TA = 25°C

MIN

MAX

UNIT

PARAMETER

FROM

(INPUT)

TO

(OUTPUT)

LOAD

CAPACITANCE

VCC

MIN

TYP

MAX

MIN

MAX

UNIT

TC

2 V

300

450

TC

(asynchronous

CL = 50 pF

4.5 V

60

90

(asynchronous

preset)

CL = 50 pF

6 V

51

77

CP

preset)

CL = 15 pF

5 V

25

CP

TC

2 V

300

450

TC

(synchronous

CL = 50 pF

4.5 V

60

90

(synchronous

preset)

CL = 50 pF

6 V

51

77

preset)

CL = 15 pF

5 V

25

2 V

200

300

tpd

TE

TC

CL = 50 pF

4.5 V

40

60

ns

tpd

TE

TC

CL = 50 pF

6 V

34

51

ns

CL = 15 pF

5 V

17

2 V

275

415

PL

TC

CL = 50 pF

4.5 V

55

83

PL

TC

CL = 50 pF

6 V

47

71

CL = 15 pF

5 V

23

2 V

275

415

MR

TC

CL = 50 pF

4.5 V

55

83

MR

TC

CL = 50 pF

6 V

47

71

CL = 15 pF

5 V

23

2 V

75

110

tt

CL = 50 pF

4.5 V

15

22

ns

tt

CL = 50 pF

6 V

13

19

ns

fmax

CP

CL = 15 pF

5 V

25

MHz

operating characteristics, VCC = 5 V, TA = 25°C, input tr, tf = 6 ns

PARAMETER

TYP

UNIT

Cpd

Power dissipation capacitance (see Note 5)

25

pF

NOTE 5: Cpd is used to determine the dynamic power consumption per package.

PD = (Cpd × VCC2 × fi) + (CL × VCC2 × fO)

fI = input frequency

fO = output frequency

CL = output load capacitance

VCC = supply voltage