V

pu(3.3)

SPEED

SOFTCON

RCV

VPO/VO

VP

VM

1.65 V to 3.6 V

System ASIC

D–

D+

1.5 kW

V

BUS

V

CC(5.0)

OE

V

reg(3.3)

SUSPND

VMO/FSE0

V

CC(I/O)

0.1 µF

3.3 V

V

CC

33 W

33 W

0.1 µF

0.1 µF

TUSB1106-Q1

GND

GND

GND

GND

GND

TUSB1106-Q1

www.ti.com

SCAS916

– AUGUST 2011

Figure 8. Peripheral-Side (Full-Speed) Regulator Bypass Mode

Peripheral-Side (Full-Speed) Regulator Bypass Mode

This mode is applicable when there is a 3.3-V supply already available on the board. The VBUS pin of the USB

connector, if left unused at the peripheral side, should be terminated with a 0.1-

μF capacitor. While operating at

full speed, the 1.5-k

Ω resistor must be connected between the D+ line and VPU(3.3) or an external 3.3-V supply.

When the VCC(5.0) and the Vreg(3.3) are connected together, the device operates at regulator bypass mode. This

enables power savings since the regulator is turned off.

Copyright

© 2011, Texas Instruments Incorporated

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Product Folder Link(s): TUSB1106-Q1