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TUSB2036

SLLS372I – MARCH 2000 – REVISED MARCH 2017

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6 Pin Configuration and Functions

VF Package

32-PIN HLQFP

(Top View)

Pin Functions

PIN

I/O

DESCRIPTION

NAME

NO.

BUSPWR

8

I

Power source indicator. BUSPWR is an active-low input that indicates whether the downstream ports source their

power from the USB cable or a local power supply. For the bus-power mode, this pin must be pulled low, and for

the self-powered mode, this pin must be pulled to 3.3 V. Input must not change dynamically during operation.

DM0

2

I/O

Root port USB differential data minus. DM0 paired with DP0 constitutes the upstream USB port.

DM1

11

I/O

USB differential data minus. DM1–DM3 paired with DP1–DP3 support up to four downstream USB ports.

DM2

15

DM3

19

DP0

1

I/O

Root port USB differential data plus. DP0 paired with DM0 constitutes the upstream USB port.

DP0PUR

27

O

Pullup resistor connection. When a system reset happens (RESET being driven to low, but not USB reset) or any

logic level change on BUSPWR pin, DP0PUR output is inactive (floating) until the internal counter reaches a 15-

ms time period. After the counter expires, DP0PUR is driven to the VCC (3.3 V) level thereafter until the next

system reset event occurs or there is a BUSPWR logic level change.

DP1

12

I/O

USB differential data plus. DP1–DP3 paired with DM1–DM3 support up to four downstream USB ports.

DP2

16

DP3

20

EECLK

5

O

EEPROM serial clock. When EXTMEM is high, the EEPROM interface is disabled. The EECLK pin is disabled and

must be left floating (unconnected). When EXTMEM is low, EECLK acts as a 3-state serial clock output to the

EEPROM with a 100-μA internal pulldown.

EEDATA/

GANGED

6

I/O

EEPROM serial data/power-management mode indicator. When EXTMEM is high, EEDATA/GANGED selects

between ganged or per-port power overcurrent detection for the downstream ports. When EXTMEM is low,

EEDATA/GANGED acts as a serial data I/O for the EEPROM and is internally pulled down with a 100-μA

pulldown. This standard TTL input must not change dynamically during operation.

EXTMEM

26

I

When EXTMEM is high, the serial EEPROM interface of the device is disabled. When EXTMEM is low, pins 5 and

6 are configured as the clock and data pins of the serial EEPROM interface, respectively.

GND

7, 28

GND pins must be tied to ground for proper operation.