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TS5USBC41 Datasheet(PDF) 21 Page - Texas Instruments |
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TS5USBC41 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 30 page ![]() C3 C2 C1 B1 A2 A2 A1 D+ B2 C4 B4 A3 B3 D- Top Layer 1 (Signal1) Inner Layer 2 (GND) Inner Layer 3 (VCC) Bottom Layer 4 (Signal2) Example 4 layer PCB Stackup Via to layer 2 (GND) Via to layer 3 (VCC) D2+ D2- D1+ D1- Via to layer 4 (Signal) SEL1 SEL2 VCC FLT# OE# GND Place near VCC pin. 21 TS5USBC41 www.ti.com SCDS377B – MARCH 2018 – REVISED JUNE 2018 Product Folder Links: TS5USBC41 Submit Documentation Feedback Copyright © 2018, Texas Instruments Incorporated 11.2 Layout Example Figure 24. Layout Example |
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