+LD_L

EN_LD

CP_LD

OUT_LDL

PGND

Ex_UVP

PVDD_LD

PVSS_LD

CN_LD

AGND

-HP_L

CN_HP

OUT

_HPR

OUT_HPL

PGND

NC

EN_HP

1

2

4

5

3

6

7

8

9

10

28

27

25

24

26

23

22

21

19

20

17

11

12

18

CP_HP

13

14

16

15

PVDD _ HP

AGND

PVSS_HP

-LD_L

+HP_L

+LD_R

-LD_R

OUT_LDR

-HP_R

+HP_R

DRV604

SLOS659A – JANUARY 2010 – REVISED APRIL 2010

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

DEVICE INFORMATION

PIN ASSIGNMENT

The DRV604 is available in the thermally enhanced package: 28-Pin HTSSOP package (PWP).

PIN FUNCTIONS

PIN

FUNCTION(1)

DESCRIPTION

NAME

PWP NO.

+LD_L

1

I

Positive input, Line driver Left

–LD_L

2

I

Negative input, Line driver Left

OUT_LDL

3

O

Output, Line driver Left

AGND

4

P

Analog Ground

EN_LD

5

I

Enable for Line driver, active high

PVSS_LD

6

O

Charge Pump Negative Supply Voltage Output for Line Driver

CN_LD

7

I/O

Charge Pump Flying Capacitor Negative connection, Line Driver

CN_HP

8

I/O

Charge Pump Flying Capacitor Negative connection, Headphone

PVSS_HP

9

O

Headphone, Charge Pump Negative Supply Voltage Output

EN_HP

10

I

Enable for Headphone, active high

AGND

11

P

Analog Ground

OUT_HPL

12

O

Output, Headphone Left

–HP_L

13

I

Negative input, Headphone Left

+HP_L

14

I

Positive input, Headphone Left

+HP_R

15

I

Positive input, Headphone Right

–HP_R

16

I

Negative input, Headphone Right

(1)

I = input, O = output, P = power

2

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Product Folder Link(s) :DRV604