V

=V

+(R I )xG

5

(V ) x10

± |

|

OSO_envelope

OSO

S

b

S+

-

·

- PSRR+

20

PSRR-

20

± |

|

5

(V ) x10

S-

- -

-

NOISE PERFORMANCE

±

±

±

14mV+75

x

W

18 Ax2

m

|

|

5

6 x10

-

50

20

-

51

20

-

±

5

( 6) x10

|

|

-

-

-

= ±22.7mV

(5)

DISTORTION PERFORMANCE

+5V

-5V

Channel

Select

EN

OPA875

+1

+2

+1

e

n

i

b

R

S

eR

S

e

O

e =2

o

e +(i R ) +4kTR

n

b

S

S

2

2

(6)

OPA875

SBOS340C – DECEMBER 2006 – REVISED AUGUST 2008 ............................................................................................................................................ www.ti.com

Leaving both temperature and gain error parameters

output stage continues to hold them low even as the

aside, the output offset voltage envelope can be

fundamental power reaches very high levels. As the

described as shown in Equation 4:

Typical

Characteristics

show,

the

spurious

intermodulation powers do not increase as predicted

by a traditional intercept model. As the fundamental

power level increases, the dynamic range does not

decrease significantly. For two tones centered at

(4)

20MHz, with 4dBm/tone into a matched 50

Ω load

(that is, 1VPP for each tone at the load, which requires

With:

4VPP for the overall 2-tone envelope at the output

VOSO: Output offset voltage

pin), the Typical Characteristics show a 82dBc

RS: Input resistance seen by R0, R1, G0, G1, B0,

difference between the test-tone power and the

or B1.

3rd-order intermodulation spurious levels.

Ib: Input bias current

G: Gain

VS+: Positive supply voltage

The OPA875 offers an excellent balance between

voltage and current noise terms to achieve low output

VS–: Negative supply voltage

noise. As long as the AC source impedance looking

PSRR+: Positive supply PSRR

out of the noninverting node is less than 100

Ω, this

PSRR–: Negative supply PSRR

current noise will not contribute significantly to the

total output noise. The device input voltage noise and

Evaluating

the

front-page

schematic,

using

a

the input current noise terms combine to give low

worst-case, +25°C offset voltage, bias current and

output noise under a wide variety of operating

PSRR specifications and operating at ±6V, gives a

conditions.

Figure

30 shows

this

device

noise

worst-case output equal to Equation 5:

analysis model with all the noise terms included. In

this model, all noise terms are taken to be noise

voltage or current density terms in either nV/

√Hz or

pA/

√Hz.

The OPA875 provides good distortion performance

into a 100

Ω load on ±5V supplies. Relative to

alternative

solutions,

it

provides

exceptional

performance into lighter loads. Generally, until the

fundamental signal reaches very high frequency or

power

levels,

the

2nd-harmonic

dominates

the

distortion with a negligible 3rd-harmonic component.

Focusing then on the 2nd-harmonic, increasing the

load impedance improves distortion directly. Also,

providing an additional supply decoupling capacitor

(0.01

µF) between the supply pins (for bipolar

Figure 30. Noise Model

operation) improves the 2nd-order distortion slightly

(3dB to 6dB).

The total output spot noise voltage can be computed

In most op amps, increasing the output voltage swing

as the square root of the sum of all squared output

increases harmonic distortion directly. The Typical

noise voltage contributors. Equation 6 shows the

Characteristics show the 2nd-harmonic increasing at

general form for the output noise voltage using the

a little less than the expected 2X rate while the

terms shown in Figure 30.

3rd-harmonic increases at a little less than the

expected 3X rate. Where the test power doubles, the

2nd-harmonic

increases

only

by

less

than

the

expected 6dB, whereas the 3rd-harmonic increases

by less than the expected 12dB. This also shows up

in the two-tone, 3rd-order intermodulation spurious

(IM3) response curves. The 3rd-order spurious levels

are extremely low at low output power levels. The

12

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