SN74HC253EP

DUAL 4LINE TO 1LINE DATA SELECTOR/MULTIPLEXER

WITH 3STATE OUTPUTS

SCLS560 − JANUARY 2004

1

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

D Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

D Extended Temperature Performance of

−40

°C to 125°C

D Enhanced Diminishing Manufacturing

Sources (DMS) Support

D Enhanced Product-Change Notification

D Qualification Pedigree†

D 3-State Version of ’HC153

D Wide Operating Voltage Range of 2 V to 6 V

D High-Current Inverting Outputs Drive Up To

15 LSTTL Loads

† Component qualification in accordance with JEDEC and industry

standards to ensure reliable operation over an extended

temperature range. This includes, but is not limited to, Highly

Accelerated Stress Test (HAST) or biased 85/85, temperature

cycle, autoclave or unbiased HAST, electromigration, bond

intermetallic life, and mold compound life. Such qualification

testing should not be viewed as justifying use of this component

beyond specified performance and environmental limits.

D Low Power Consumption, 80-µA Max ICC

D Typical tpd = 9 ns

D ±6-mA Output Drive at 5 V

D Low Input Current of 1 µA Max

D Permit Multiplexing From n Lines to One

Line

D Perform Parallel-to-Serial Conversion

description/ordering information

Each data selector/multiplexer contains inverters and drivers to supply full binary decoding data selection to the

AND-OR gates. Separate output-control inputs are provided for each of the two 4-line sections.

The 3-state outputs can interface with and drive data lines of bus-organized systems. With all but one of the

common outputs disabled (in the high-impedance state), the low impedance of the single enabled output drives

the bus line to a high or low logic level. Each output has its own output-enable (OE) input. The outputs are

disabled when their respective OE is high.

ORDERING INFORMATION

TA

PACKAGE‡

ORDERABLE

PART NUMBER

TOP-SIDE

MARKING

−40

°C to 125°C

SOIC − D

Tape and reel

SN74HC253QDREP

SHC253QEP

‡ Package drawings, standard packing quantities, thermal data, symbolization, and PCB design

guidelines are available at www.ti.com/sc/package.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

D PACKAGE

(TOP VIEW)

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

1OE

B

1C3

1C2

1C1

1C0

1Y

GND

VCC

2OE

A

2C3

2C2

2C1

2C0

2Y

Copyright

 2004, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.