SN54173, SN54LS173A, SN74173, SN74LS173A

4-BIT D-TYPE REGISTERS

WITH 3-STATE OUTPUTS

SDLS067A – OCTOBER 1976 – REVISED JUNE 1999

2

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

FUNCTION TABLE

INPUTS

OUTPUT

CLR

CLK

DATA ENABLE

DATA

OUTPUT

Q

CLR

CLK

G1

G2

D

Q

H

X

X

X

X

L

L

LX

X

X

Q0

L

↑

HX

X

Q0

L

↑

XH

X

Q0

L

↑

L

L

L

L

L

↑

L

L

H

H

When either M or N (or both) is (are) high, the output is

disabled to the high-impedance state; however, sequential

operation of the flip-flops is not affected.

logic symbol†

G2

G1

G2

G1

1Q

3

R

15

CLR

13

2D

2Q

4

12

3D

3Q

5

11

4D

4Q

6

1

M

10

7

CLK

&

† This symbol is in accordance with ANSI/IEEE Standard 91-1984 and IEC Publication 617-12.

Pin numbers shown are for D, J, N, and W packages.

&

EN

C1

2

N

9

1D

14

1D

1Q

3

R

15

CLR

13

2D

2Q

4

12

3D

3Q

5

11

4D

4Q

6

1

M

10

7

CLK

&

&

EN

C1

2

N

9

1D

14

1D

’173

’LS173A