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PCF85263ATL/AX Datasheet(PDF) 34 Page - NXP Semiconductors |
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PCF85263ATL/AX Datasheet(HTML) 34 Page - NXP Semiconductors |
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34 / 100 page  PCF85263A All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2015. All rights reserved. Product data sheet Rev. 4.1 — 27 November 2015 34 of 100 NXP Semiconductors PCF85263A Tiny RTC with alarm, battery switch-over, and I2C-bus 8.8 Offset register The PCF85263A incorporates an offset register (address 24h) which can be used to implement several functions, such as: • Accuracy tuning • Aging adjustment • Temperature compensation There are two modes which define the correction period, normal mode and fast mode. The normal mode is suitable for offset trimming. The fast mode is suitable for dynamic offset correction e.g. implementing a temperature correction. The fast mode consumes more current. Offset mode is defined by bit OFFM in the Oscillator register (Section 8.10). [1] Default value. For OFFM = 0, each LSB introduces an offset of 2.170 ppm. For OFFM = 1, each LSB introduces an offset of 2.0345 ppm. The offset value is coded in two’s complement giving a range of +127 LSB to 128 LSB, see Table 25. [1] Default value. Table 23. Offset - offset register (address 24h) bit description Bit Symbol Value Description 7 to 0 OFFSET[7:0] see Table 25 offset value Table 24. OFFM bit - oscillator control register (address 25h) See Section 8.10 on page 42. Bit Symbol Value Description 6OFFM offset mode bit 0[1] normal mode: correction is made every 4 hours; 2.170 ppm/step 1 fast mode: correction is made once every 8 minutes;2.0345 ppm/step Table 25. Offset values OFFSET[7:0] Offset value in decimal Offset value in ppm Normal mode OFFM = 0 Fast mode OFFM = 1 01111111 +127 +275.590 +258.3815 01111110 +126 +273.420 +256.3470 :: : : 00000010 +2 +4.340 +4.0690 00000001 +1 +2.170 +2.0345 00000000[1] 00[1] 0[1] 11111111 1 2.170 2.0345 11111110 2 4.340 4.0690 :: : : 10000001 127 275.590 258.3815 10000000 128 277.760 260.416 |
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