TLV5619EP

2.7 V TO 5.5 V 12BIT PARALLEL DIGITALTOANALOG CONVERTER

WITH POWER DOWN

SGLS124A − JULY 2002 − REVISED DECEMBER 2003

4

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range, supply

voltages, and reference voltages (unless otherwise noted)

static DAC specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Resolution

Vref(REFIN) = 2.048 V at 5 V,

1.024 V at 3 V

12

bits

Integral nonlinearity (INL)

Vref(REFIN) = 2.048 V at 5 V,

1.024 V at 3 V,

See Note 3

±1.5

±4

LSB

Differential nonlinearity (DNL)

Vref(REFIN) = 2.048 V at 5 V,

1.024 V at 3 V,

See Note 4

± 0.4

± 1

LSB

EZS

Zero-scale error (offset error at zero scale)

Vref(REFIN) = 2.048 V at 5 V,

1.024 V at 3 V,

See Note 5

±3

±20

mV

Zero-scale-error temperature coefficient

Vref(REFIN) = 2.048 V at 5 V,

1.024 V at 3 V,

See Note 6

3

ppm/

°C

EG

Gain error

Vref(REFIN) = 2.048 V at 5 V,

1.024 V at 3 V,

See Note 7

±0.25

±0.5

% of FS

voltage

Gain error temperature coefficient

Vref(REFIN) = 2.048 V at 5 V,

1.024 V at 3 V,

See Note 8

1

ppm/

°C

PSRR

Power-supply rejection ratio

Zero scale

See Notes 9 and 10

65

dB

PSRR

Power-supply rejection ratio

Gain

See Notes 9 and 10

65

dB

NOTES:

3. The relative accuracy or integral nonlinearity (INL), sometimes referred to as linearity error, is the maximum deviation of the output

from the line between zero and full scale excluding the effects of zero code and full-scale errors.

4. The differential nonlinearity (DNL), sometimes referred to as differential error, is the difference between the measured and ideal 1

LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains

constant) as a change in the digital input code.

5. Zero-scale error is the deviation from zero voltage output when the digital input code is zero.

6. Zero-scale-error temperature coefficient is given by: EZS TC = [EZS (Tmax) − EZS (Tmin)]/Vref × 106/(Tmax − Tmin).

7. Gain error is the deviation from the ideal output (2

× Vref − 1 LSB) with an output load of 10 kΩ excluding the effects of the zero-error.

8. Gain temperature coefficient is given by: EG TC = [EG(Tmax) − EG (Tmin)]/Vref × 106/(Tmax − Tmin).

9. Zero-scale-error rejection ratio (EZS-RR) is measured by varying the VDD from 4.5 V to 5.5 V dc and measuring the proportion of

this signal imposed on the zero-code output voltage.

10. Gain-error rejection ratio (EG-RR) is measured by varying the VDD from 4.5 V to 5.5 V dc and measuring the proportion of this signal

imposed on the full-scale output voltage after subtracting the zero scale change.

output specifications

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

VO

Voltage output range

RL = 10 kΩ

0

VDD−0.4

V

Output load regulation accuracy

VO(OUT) = 4.096 V,

2.048 V

RL = 2 kΩ

0.1

0.29

% of FS

voltage

IOSC(source)

Output short circuit source current

VO(OUT) = 0 V,

Full scale code

5-V Supply

100

mA

IOSC(source)

Output short circuit source current

VO(OUT) = 0 V,

Full scale code

3-V Supply

25

mA

IO(source)

Output source current

RL = 100 Ω

5-V Supply

10

mA

IO(source)

Output source current

RL = 100 Ω

3-V Supply

10

mA