TLV5619EP

2.7 V TO 5.5 V 12BIT PARALLEL DIGITALTOANALOG CONVERTER

WITH POWER DOWN

SGLS124A − JULY 2002 − REVISED DECEMBER 2003

5

POST OFFICE BOX 655303

• DALLAS, TEXAS 75265

electrical characteristics over recommended operating free-air temperature range, supply

voltages, and reference voltages (unless otherwise noted)

reference input (REFIN)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Vref

Reference input voltage

See Note 11

0

VDD−1.5

V

Ri

Reference input resistance

10

M

Ω

Ci

Reference input capacitance

5

pF

Reference feed through

REFIN = 1 Vpp at 1 kHz + 1.024 V dc (see Note 12)

−60

dB

Reference input bandwidth

REFIN = 0.2 Vpp + 1.024 V dc at −3 dB

1.4

MHz

NOTES: 11. Reference input voltages greater than VDD/2 will cause output saturation for large DAC codes.

12. Reference feedthrough is measured at the DAC output with an input code = 0x000 and a Vref(REFIN) input = 1.024 V dc + 1 Vpp at

1 kHz.

digital inputs (D0 − D11, CS, WE, LDAC, PD)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IIH

High-level digital input current

VI = VDD

1

µA

IIL

Low-level digital input current

VI = 0 V

−1

µA

Ci

Input capacitance

8

pF

power supply

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

IDD

Power supply current

No load, All inputs 0 V or VDD

5-V Supply

1.6

3

mA

IDD

Power supply current

No load, All inputs 0 V or VDD

3-V Supply

1.44

2.7

mA

Power down supply current

0.01

10

µA