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TMP107 Datasheet(PDF) 12 Page - Texas Instruments

Part # TMP107
Description  TMP107 Digital Temperature Sensor With Bidirectional UART One-Wire Interface and EEPROM
PDF  41 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TMP107 Datasheet(HTML) 12 Page - Texas Instruments

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High Limit
Low Limit
Time
Measured
Temperature
FHx
FLx
Configuration and Temperature
Register Reads
ALERTx Pin
Global Alert Clear x Command
12
TMP107
SBOS716D – MAY 2015 – REVISED JANUARY 2020
www.ti.com
Product Folder Links: TMP107
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Copyright © 2015–2020, Texas Instruments Incorporated
7.3.2 Temperature Limits and Alert
The TMP107 has two ALERTx pins (ALERT1 and ALERT2) for under- and overtemperature monitor functions.
Both pins have independent, dynamically-programmable limits. At the end of each conversion, the temperature
result is compared with the high limit and low limit registers. If the temperature is outside the limit window, the
respective ALERTx pin trips. There are two polarity bits that set the active state of the ALERTx pin. The TMP107
has two flag bits (FHx and FLx) for each alert condition to indicate in which direction the temperature has moved
outside of the limit window.
There are two operating modes used for alerts and flags: therm and alert. In therm mode, the ALERTx pins and
FHx and FLx flags are outputs of a transparent comparator. In alert mode, the ALERTx pins and FHx and FLx
flags are latched interrupts. Select between alert mode or therm mode by using the Tx/Ax (T1/A1 and T2/A2) bits
in the configuration register.
In alert mode (Tx/Ax = 0, default), the high and low limits form a temperature window. At the end of a conversion,
if the temperature result exceeds the high limit or is less than the low limit, the respective flag (either FHx or FLx)
and the ALERTx pin are asserted. If the alert outputs of multiple TMP107s are connected together, the TMP107
tripped alerts are still identifiable. To clear the ALERTx pin, issue a global alert clear x command, or read the
configuration register as shown in Figure 16. To clear the FHx or FLx flag, read the configuration register. Alert-
mode operation is shown in Figure 16.
Figure 16. ALERTx Pin Behavior in Alert Mode (POLx = 0)



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