MPQ2967

– DUAL-LOOP, DIGITAL, 4-PHASE VR CONTROLLER, AEC-Q100

Notice: The information in this document is subject to change without notice. Please contact MPS for current specifications.

Users should warrant and guarantee that third-party Intellectual Property rights are not infringed upon when integrating MPS

products into any application. MPS will not assume any legal responsibility for any said applications.

MPQ2967 Rev. 1.11

MonolithicPower.com

5

1/22/2025

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

© 2025 MPS. All Rights Reserved.

PIN FUNCTIONS (continued)

Pin #

Name

I/O

Description

32

VSPB

A [I]

Positive remote voltage sense input for rail B. Directly connect the VSPB pin

to the VR

’s output voltage at the load. Differentially route VSPB with VSNB.

33

PHSEL

A [I]

Strap for phase configuration selection.

34

ADDR

A [I]

Strap for PMBus address selection.

35

TEMPA

A [I]

Analog signal from the VR

’s rail A to the VID controller. The TEMPA pin

indicates the power stage temperature. Connect the TOUT/FLT pin of each Intelli-

PhaseTM on rail A together to produce the maximum junction temperature, then

connect these pins to the controller

’s TEMPA pin.

36

TEMPB

A [I]

Analog signal from the VR

’s rail B to the VID controller. The TEMPB pin

indicates the power stage temperature. Connect the TOUT/FLT pin of each Intelli-

PhaseTM on rail B together to produce the maximum junction temperature, then

connect these pins to the controller

’s TEMPB pin.

37

VDD18

A [I/O]

1.8V LDO output for the internal digital power supply. Connect a 1µF bypass

capacitor from the VDD18 pin to AGND.

38

VINSEN

A [I]

Input voltage sense. Connect the VINSEN pin to VIN through a 1/16 divider

network.

39

VDD5

A [I]

5V power supply input. Connect a 4.7µF bypass capacitor from the VDD5 pin

to the ground.

40

CSBIASA

A [I]

Biased voltage for IMON on rail A. If the CSBIASA pin is not required, it should

not have a connection.

PAD

AGND

A [I/O] Analog ground.