8

SW

XCON

9

DRVH

10 VBST

VREG

UV

± 32%

1

VFB

Control Logic

+

+20%

OV

6

PGND

+

2

PG

4

EN

+

+

REF

SS

+ 16%

+

± 16%

+

Enable

Logic

SS Logic

UV

Protection

Logic

OV

UVLO

TSD

7

DRVL

One-

Shot

VREG

5

VIN

3

VREG5

VREG5

UVLO

REF

REF

+

OCL

10 µA

ADC

SW

Copyright © 2016, Texas Instruments Incorporated

13

TPS53015

www.ti.com

SLVSBF0C – JULY 2012 – REVISED APRIL 2019

Product Folder Links: TPS53015

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Copyright © 2012–2019, Texas Instruments Incorporated

7 Detailed Description

7.1 Overview

The TPS53015 is single synchronous step-down buck controller. It operates using D-CAP2 mode control. The

fast transient response of D-CAP2 control reduces the required amount of output capacitance to meet a specific

level of performance. Proprietary internal circuitry allows the use of low-ESR output capacitors including ceramic

and special polymer types.

7.2 Functional Block Diagram

7.3 Feature Description

7.3.1 Drivers

The TPS53015 device contains two high-current resistive MOSFET gate drivers. The low-side driver is a PGND

referenced, VREG5 powered driver designed to drive the gate of a high-current, low RDS(on) N-channel MOSFET

whose source is connected to PGND. The high-side driver is a floating SW referenced, VBST powered driver

designed to drive the gate of a high-current, low RDS(on) N-channel MOSFET. To maintain the VBST voltage

during the high-side driver ON-time, a capacitor is placed from SW to VBST. Each driver draws average current

equal to gate charge (Qg and Vgs = 5 V) times switching frequency (fSW). To prevent cross-conduction, there is a

narrow dead-time when both high-side and low-side drivers are OFF between each driver transition. During this

time the inductor current is carried by one of the MOSFETs body diodes.