TPS54672PWPR datasheet(13/20 Pages) TI2

13 / 20 page

TPS54672

SLVS397C − JULY 2001 − REVISED FEBRUARY 2005

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If the current limit comparator trips for longer than 100 ns,

the PWM latch resets before the PWM ramp exceeds the

error amplifier output. The high-side FET turns off and

low-side FET on to decrease the output current. This

process is repeated each cycle in which the current limit

comparator is tripped.

Dead-Time Control and MOSFET Drivers

Adaptive

dead-time

control

prevents

shoot-through

current from flowing in both N-channel power MOSFETs

during the switching transitions by actively controlling the

turnon times of the MOSFET drivers. The high-side driver

does not turn on until the gate drive voltage to the low-side

FET is below 2 V, while the low-side driver does not turn

on until the voltage at the junction of the power MOSFETs

(PH pin) is below 2 V.

The high-side and low-side drivers are designed with

300-mA source and sink capability to quickly drive the

power MOSFETs gates. The low-side driver is supplied

from VIN, while the high-side drive is supplied from the

BOOT pin. A bootstrap circuit uses an external BOOT

capacitor and internal 2.5-

Ω bootstrap switch connected

between the VIN and BOOT pins. The bootstrap switch is

turned on when the low-side FET is on to charge the BOOT

capacitor. The low resistance of the bootstrap switch

improves drive efficiency and reduces external component

count.

Overcurrent Protection

The cycle by cycle current limiting is achieved using a

sense-FET on the high-side MOSFET and differential

amplifier with preset overcurrent threshold. The high-side

MOSFET is turned off within 200 ns of the voltage on the

sense-FET exceeding the current limit threshold. A 100-ns

leading edge blanking circuit prevents false tripping of the

current limit when the high-side switch is turning on.

Current limit detection occurs only when current flows from

VIN to PH when current is being sourced to the output filter.

Load protection during current sink operation is provided

by thermal shutdown.

Thermal Shutdown

Thermal shutdown turns off the power MOSFETs and

disables the control circuits if the junction temperature

exceeds the 150

°C. The device is released from shutdown

automatically when the junction temperature decreases to

°C, and starts up under control of the slow-start circuit.

Status (STATUS)

The status pin is an open drain output that indicates when

internal conditions are sufficient for proper operation.

STATUS can be coupled back to a system controller or

monitor circuit to indicate that the termination or tracking

regulator is ready for start up. STATUS is high impedance

when the TPS54672 is operating or ready to be enabled.

STATUS is active low if any of the following occur:

D VIN < UVLO threshold

D VBIAS or internal reference have not settled.

D Thermal shutdown is active.

TPS54672PWPR Datasheet(PDF) 13 Page - Texas Instruments

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