LM49101, LM49101TMEVAL

www.ti.com

SNAS475A – MARCH 2009 – REVISED APRIL 2013

LM49101 Reference Demo Board Bill Of Materials

Table 8. Bill Of Materials

Designator

Vlaue

Tolerance

Part Description

Comment

R1, R2

5.1k

Ω

5%

1/10W, 0603 Resistors

R3, R4

10

Ω

1%

1/10W, 0603 Resistors

R5

100k

Ω

5%

1/10W, 0805 Resistor

CIN1, CIN2

1

μF

10%

1206, X7R Ceramic Capacitor

CIN3, CIN4

CS1, CS4

2.2

μF

10%

Size A, Tantalum Capacitor

CS5, CB

CS2

0.1

μF

10%

0805, 16V, X7R Ceramic Capacitor

CS3, C1

2.2

μF

10%

0603, 10V, X7R Ceramic Capacitor

U1

LM49101TM

J1, J2, J3

J5, J7, J8

0.100" 1x2 header, vertical mount

Input, Output, VDD, GND

J9, J10, J14

J11, J12, J13

0.100" 1x3 header, vertical mount

VDD Selects, VDD, I

2CV

DD, GND

J6

16 pin header

I2C Connector

J4

Headphone Jack

SW1

Momentary Push Switch

RESET function

PCB Layout Guidelines

This section provides practical guidelines for mixed signal PCB layout that involves various digital/analog power

and ground traces. Designers should note that these are only "rule-of-thumb" recommendations and the actual

results will depend heavily on the final layout.

General Mixed Signal Layout Recommendations

SINGLE-POINT POWER AND GROUND CONNECTIONS

The analog power traces should be connected to the digital traces through a single point (link). A "Pi-filter" can

be helpful in minimizing high frequency noise coupling between the analog and digital sections. It is further

recommended to put digital and analog power traces over the corresponding digital and analog ground traces to

minimize noise coupling.

PLACEMENT OF DIGITAL AND ANALOG COMPONENTS

All digital components and high-speed digital signals traces should be located as far away as possible from

analog components and circuit traces.

AVOIDING TYPICAL DESIGN AND LAYOUT PROBLEMS

Avoid ground loops or running digital and analog traces parallel to each other (side-by-side) on the same PCB

layer. When traces must cross over each other do it at 90 degrees. Running digital and analog traces at 90

degrees to each other from the top to the bottom side as much as possible will minimize capacitive noise

coupling and cross talk.

Copyright © 2009–2013, Texas Instruments Incorporated

Submit Documentation Feedback

27

Product Folder Links: LM49101 LM49101TMEVAL