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ADS7812PB Datasheet(PDF) 7 Page - Texas Instruments

Part # ADS7812PB
Description  Low-Power, Serial 12-Bit Sampling ANALOG-TO-DIGITAL CONVERTER
PDF  28 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

ADS7812PB Datasheet(HTML) 7 Page - Texas Instruments

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ADS7812
7
SBAS042A
www.ti.com
1
2
3
4
5
6
7
8
R1
IN
GND
R2
IN
R3
IN
BUF
CAP
REF
GND
V
S
PWRD
BUSY
CS
CONV
EXT/INT
DATA
DATACLK
16
15
14
13
12
11
10
9
ADS7812
±10V
+5V
C
3
1µF
C
4
0.01µF
C
1
0.1µF
C
2
10µF
C
5
1µF
+
+
Convert Pulse
40ns min
+
Frame Sync (optional)
BASIC OPERATION
INTERNAL DATACLK
Figure 1a shows a basic circuit to operate the ADS7812 with
a
±10V input range. To begin a conversion and serial
transmission of the results from the previous conversion, a
falling edge must be provided to the CONV input. BUSY
will go LOW indicating that a conversion has started and
will stay LOW until the conversion is complete. During the
conversion, the results of the previous conversion will be
transmitted via DATA while DATACLK provides the syn-
chronous clock for the serial data. The data format is 12-bit,
Binary Two’s Complement, and MSB first. Each data bit is
valid on both the rising and falling edge of DATACLK.
BUSY is LOW during the entire serial transmission and can
be used as a frame synchronization signal.
EXTERNAL DATACLK
Figure 1b shows a basic circuit to operate the ADS7812 with
a
±10V input range. To begin a conversion, a falling edge
must be provided to the CONV input. BUSY will go LOW
indicating that a conversion has started and will stay LOW
until the conversion is complete. Just prior to BUSY rising
near the end of the conversion, the internal working register
holding the conversion result will be transferred to the
internal shift register.
The internal shift register is clocked via the DATACLK
input. The recommended method of reading the conversion
result is to provide the serial clock after the conversion has
completed. See External DATACLK under the Reading
Data section of this data sheet for more information.
FIGURE 1a. Basic Operation,
±10V Input Range, Internal DATACLK.
FIGURE 1b. Basic Operation,
±10V Input Range, External DATACLK.
1
2
3
4
5
6
7
8
R1
IN
GND
R2
IN
R3
IN
BUF
CAP
REF
GND
V
S
PWRD
BUSY
CS
CONV
EXT/INT
DATA
DATACLK
16
15
14
13
12
11
10
9
ADS7812
±10V
NOTE: (1) Tie CS to GND if the outputs will always be active.
+5V
+5V
C
1
0.1µF
C
2
10µF
C
5
1µF
+
Convert Pulse
40ns min
+
Interrupt (optional)
External Clock
Chip Select (optional(1))
C
3
1µF
C
4
0.01µF
+



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