VOUT

PsOpp

ID

VOUT

PsOpp

ID

21

LM3017

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SNOSC66D – MARCH 2012 – REVISED SEPTEMBER 2016

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The ESR of the output capacitor(s) has a strong influence on the slope and direction of the output voltage ripple.

Capacitors with high ESR such as tantalum and aluminum electrolytic create an output voltage ripple that is

dominated by ΔVO1 with a shape shown in Figure 21. Ceramic capacitors, in contrast, have a very low ESR and

lower capacitance, and the shape of the output voltage ripple is dominated by ΔVO2 with a shape shown in

Figure 22.

Figure 21. ΔVOpp Using High ESR Capacitors

Figure 22. ΔVOpp Using Low ESR Capacitors

Ceramic capacitors are recommended with a typical value from 10 µF to 100 µF. The minimum quality dielectric

that is suitable for switching power supply output capacitors is X5R, while X7R (or better) is preferred. Careful

attention must be paid to the DC voltage rating and case size, as ceramic capacitors can lose 60% or more of

their rated capacitance at the maximum DC voltage. This is the reason that ceramic capacitors often derate to

50% of their capacitance at their working voltage.

8.2.2.11 VCC Decoupling Capacitor

The internal bias of the LM3017 comes from either the internal bias voltage generator as shown in the block

diagram or directly from the voltage at the VIN pin. At input voltages lower than 6 V, the internal IC bias is the

input voltage and at voltages above 6 V the internal bias voltage generator of the LM3017 provides the bias. A

good quality ceramic bypass capacitor must be connected from the VCC pin to the PGND pin for proper

operation. This capacitor supplies the transient current required by the internal MOSFET driver, as well as

filtering the internal supply voltage for the controller. TI recommends a value of between 0.47 µF and 4.7 µF.

8.2.2.12 Slope Compensation Ramp

The LM3017 uses a current mode control scheme. The main advantages of current mode control are inherent

cycle-by-cycle current limit for the switch, simpler control loop characteristics and excellent line and load transient

response. However, there is a natural instability due to subharmornic oscillations that occurs for duty cycles, D,

greater than 50% if slope compensation is not addressed in Equation 33.

MC > M2 / 2

(33)

For best input noise immunity, use Equation 34.

MC = M2

(34)

For best sub-harmonic suppression, use Equation 35.

MC = M2 / 2

where

•

MC is the slope of the compensation ramp

•

M1 is the slope of the inductor current during the ON time

•

M2 is the slope of the inductor current during the OFF time

•

RSEN is the sensing resistor value

•

VOUT represents the output voltage

•

VIN represents the input voltage

•

A is equal to 0.86 and it is the internal sensing amplification of the LM3017

(35)

In the case of the boost topology, use Equation 36 and Equation 37.