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ADS9128RHAR Datasheet(PDF) 36 Page - Texas Instruments |
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ADS9128RHAR Datasheet(HTML) 36 Page - Texas Instruments |
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36 / 67 page ![]() 7.2.1 Register 0Dh (offset = Dh) [reset = 2002h] Figure 7-13. Register 0Dh 15 14 13 12 11 10 9 8 RESERVED DATA_FORMAT RESERVED LAT_INC R/W-0h R/W-1h R/W-0h R/W-0h 7 6 5 4 3 2 1 0 GE_CAL_EN1 OSR_EN OSR RESERVED R/W-0h R/W-0h R/W-0h R/W-2h Figure 7-14. Register 0Dh Field Descriptions Bit Field Type Reset Description 15-14 RESERVED R/W 0h Reserved. Do not change from the default reset value. 13 DATA_FORMAT R/W 1h Select data format for the ADC conversion result. 0 : Straight-binary format 1 : Two's-complement format 12-10 RESERVED R/W 0h Reserved. Do not change from the default reset value. 9-8 LAT_INC R/W 0h For the ADS9129, set this field to 11b for optimum INL performance. 7 GE_CAL_EN1 R/W 0h Global control for gain error calibration. 0 : Gain error calibration disabled 1 : Gain error calibration enabled 6 OSR_EN R/W 0h Control for data averaging depth. 0 : Data averaging disabled 1 : Data averaging enabled 5-2 OSR R/W 0h Control for enabling data averaging. 0 : 2 samples averaged 1 : 4 samples averaged 2 : 8 samples averaged 3 : 16 samples averaged 1-0 RESERVED R/W 2h Reserved. Do not change from the default reset value. 7.2.2 Register 10h (offset = 10h) [reset = 0h] Figure 7-15. Register 10h 15 14 13 12 11 10 9 8 RESERVED R/W-0h 7 6 5 4 3 2 1 0 RESERVED RESERVED R/W-0h R/W-0h Figure 7-16. Register 10h Field Descriptions Bit Field Type Reset Description 15-1 RESERVED R/W 0h Reserved. Do not change from the default reset value. 0 HI_FREQ R/W 0h Analog input fast slew rate control 0: Normal slew rate. 1: Fast slew rate. Fast analog input control enabled. Recommended for input frequencies >2MHz. Also see the HI_FREQ_EN register bit. ADS9127, ADS9128, ADS9129 SBASB82 – MAY 2025 www.ti.com 36 Submit Document Feedback Copyright © 2025 Texas Instruments Incorporated Product Folder Links: ADS9127 ADS9128 ADS9129 |
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