7 Detailed Description

7.1 Overview

The CDx4HC(T)138 and '238 are high speed silicon gate CMOS decoders well suited to memory address

decoding or data routing applications. They contain a single 3:8 decoder.

The CDx4HC(T)138 and '238 have three address select inputs (A2, A1, and A0). The circuit functions as a normal

one-of-eight decoder.

Three strobe inputs (G2, G 1 and G 0) are provided to simplify cascading and to facilitate demultiplexing. When

any input strobe is active, all outputs are forced into the high state for the '138 function. When any input strobe is

active, all outputs are forced into the low state for the '238 function.

The demultiplexing function is accomplished by first using the select inputs to choose the desired output, and

then using one of the strobe inputs as the data input.

The outputs for the CDx4HC(T)138 are normally low when selected. The outputs for the CDxHC(T)238 are

normally high when selected.

7.2 Functional Block Diagram

A

0

A

1

A

2

OUTPUT

ENABLE

Y

0

Y

1

Y

2

G

1

G

2

Y

3

Y

4

Y

5

Y

6

Y

7

G

0

3:8 DECODER

000

001

010

011

100

101

110

111

Figure 7-1. Functional Block Diagram '138

CD54HC138, CD74HC138, CD54HCT138, CD74HCT138, CD54HC238, CD74HC238, CD54HCT238,

CD74HCT238

SCHS147J – NOVEMBER 1998 – REVISED NOVEMBER 2021

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