L9942 datasheet(26/40 Pages) STMICROELECTRONICS

26 / 40 page

SPI - control and status registers

L9942

26/40

Doc ID 11778 Rev 7

5.6

The meaning of the different bits is as follows:

5.7

The meaning of the different bits is as follows:

Table 19.

CLR

(PWM)

Filter

Freq.

REF

ERR

Open load

Current profile 8

Bit

Access

r w

Reset

Name

CLR6

SST

PWM

Freq.

RREF

Error

Phase

I4 I3 I2 I1 I0

These bits are loaded in register1 DAC Phase A or B if needed

See also parameter Table 12

Phase B Phase A

These bits indicate open load at bridges

RREF Error

This bit indicates if reference current is OK (150 µA <IREF < 250 µA), then is RERR=0.

This bit indicates stall detection.

PWM Freq.

This bit sets frequency of PWM cycle. FRE=1 frequency 20 kHz, FRE=0 frequency 30 kHz

This bit sets filter time in glitch filter. FT=0 TF =1.5 µs, FT=1 TF = 2.5 µs

SST

This bit specifies output PWM to reflect same logical level like bit ST.

CLR6

This bit resets all read only bits to 0 in register 6.

Table 20.

CLR

Temperature

VS monitor

Overcurrent

Bit

Access

r w

Reset

Name

CLR7

TSD

OV(W)

HSB2 HSB1

LSB2

LSB1

HSA2

HSA1

LSA2

LSA1

bit7 ... bit0

These bits indicate overcurrent in each low side or highside power transistor.

overcurrent failure I > 2 A

OV(W) UV

These bits indicates failure at VS (See also parameter Table 9)

Voltage at pin VS is too low.

Voltage at pin VS is too high.

TSD TW

These bits indicates temperature failure (See also parameter Table 7)

Only for information set at temperature warning threshold.

In case of thermal shutdown all bridges are switched off. It has to reset by bit CLR7.

CLR7

This bit resets all bits to 0 in register 7.

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