G=1+

49.4kW

R

G

21

INA826S

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SBOS770A – MAY 2017 – REVISED JUNE 2017

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Feature Description (continued)

7.3.2 Setting the Gain

Gain of the INA826S is set by a single external resistor, RG, connected between pins 2 and 3. Use Equation 1 to

select the value of RG:

(1)

Table 1 lists several commonly-used gains and resistor values. The 49.4-k

Ω term in Equation 1 comes from the

sum of the two internal 24.7-kΩ feedback resistors. These on-chip resistors are laser-trimmed to accurate

absolute values. The accuracy and temperature coefficients of these resistors are included in the gain accuracy

and drift specifications of the INA826S.

Table 1. Commonly-Used Gains and Resistor Values

DESIRED GAIN (V/V)

RG (Ω)

NEAREST 1% RG (Ω)

1

—

—

2

49.4 k

49.9 k

5

12.35 k

12.4 k

10

5.489 k

5.49 k

20

2.600 k

2.61 k

50

1.008 k

1 k

100

499

499

200

248

249

500

99

100

1000

49.5

49.9

7.3.2.1 Gain Drift

The stability and temperature drift of the external gain setting resistor, RG, also affects gain. The contribution of

RG to gain accuracy and drift can be directly inferred from the gain of Equation 1.

The best gain drift of 1 ppm/

℃ can be achieved when the INA826S uses G = 1 without RG connected. In this

case, the gain drift is limited only by the slight mismatch of the temperature coefficient of the integrated 50-kΩ

resistors in the differential amplifier (A3). At G greater than 1, the gain drift increases as a result of the individual

drift of the 24.7-kΩ resistors in the feedback of A1 and A2, relative to the drift of the external gain resistor RG.

Process improvements of the temperature coefficient of the feedback resistors now make possible specifying a

maximum gain drift of the feedback resistors of 35 ppm/

℃, thus significantly improving the overall temperature

stability of applications using gains greater than 1.

Low resistor values required for high gain can make wiring resistance important. Sockets add to the wiring

resistance and contribute additional gain error (such as a possible unstable gain error) at gains of approximately

100 or greater. To ensure stability, avoid parasitic capacitance of more than a few picofarads at RG connections.

Careful matching of any parasitics on both RG pins maintains optimal CMRR over frequency; see typical

characteristic curves Figure 22 and Figure 23.