1

2

3

4

5

6

7

8

16

14

13

12

11

10

9

INB

OUTC

VCC2

VCC1

0.1 µF

0.1 µF

Copyright © 2016, Texas Instruments Incorporated

INA

OUTB

OUTD

IND

OUTC

INC

VCC1

GND1

INA

INB

OUTC

OUTD

EN1

GND1

VCC2

GND2

OUTA

OUTB

INC

IND

EN2

GND2

GND1

GND2

GND1

GND2

EN

EN

ISO7842

Figure 8-2. Typical ISO7842 Circuit Hook-Up

8.2.3 Application Curve

The typical eye diagram of the ISO7842 device indicates low jitter and wide open eye at the maximum data rate

of 100Mbps.

Figure 8-3. Eye Diagram at 100Mbps PRBS, 5V and 25°C

8.3 Power Supply Recommendations

To help provide reliable operation at data rates and supply voltages, a 0.1μF bypass capacitor is recommended

at input and output supply pins (VCC1 and VCC2). The capacitors must be placed as close to the supply pins

as possible. If only a single primary-side power supply is available in an application, isolated power can be

generated for the secondary-side with the help of a transformer driver such as Texas Instruments SN6501. For

such applications, detailed power supply design and transformer selection recommendations are available in

SN6501 Transformer Driver for Isolated Power Supplies.

ISO7842, ISO7842F

SLLSEJ0I – OCTOBER 2014 – REVISED JULY 2025

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22

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