6.3.6 Current Limit

The LM5164 manages overcurrent conditions with cycle-by-cycle current limiting of the peak inductor current.

The current sensed in the high-side MOSFET is compared every switching cycle to the current limit threshold

(1.5 A). To protect the converter from potential current runaway conditions, the LM5164 includes a foldback

valley current limit feature, set at 1.2 A, that is enabled if a peak current limit is detected. As shown in Figure

6-1, if the peak current in the high-side MOSFET exceeds 1.5 A (typical), the present cycle is immediately

terminated regardless of the programmed on-time (tON), the high-side MOSFET is turned off and the foldback

valley current limit is activated. The low-side MOSFET remains on until the inductor current drops below this

foldback valley current limit, after which the next on-pulse is initiated. This method folds back the switching

frequency to prevent overheating and limits the average output current to less than 1.5 A to ensure proper

short-circuit and heavy-load protection of the LM5164.

t

VREF

IAVG(ILIM)

iL

tSW

Peak ILIM

Valley ILIM

< tON

tON

IAVG1

> tSW

vFB

Figure 6-1. Current Limit Timing Diagram

Current is sensed after a leading-edge blanking time following the high-side MOSFET turnon transition. The

propagation delay of the current limit comparator is 100 ns. During high step-down conditions when the on-time

is less than 100 ns, a back-up peak current limit comparator in the low-side FET also set at 1.5 A enables

the foldback valley current limit set at 1.2 A. This innovative current limit scheme enables ultra-low duty-cycle

operation, permitting large step-down voltage conversions while ensuring robust protection of the converter.

6.3.7 N-Channel Buck Switch and Driver

The LM5164 integrates an N-channel buck switch and associated floating high-side gate driver. The gate-driver

circuit works in conjunction with an external bootstrap capacitor and an internal high-voltage bootstrap diode. A

high-quality 2.2-nF, 50-V X7R ceramic capacitor connected between the BST and SW pins provides the voltage

to the high-side driver during the buck switch on-time. See the Section 6.3.2 section for limitations. During the

off-time, the SW pin is pulled down to approximately 0 V, and the bootstrap capacitor charges from the internal

VCC through the internal bootstrap diode. The minimum off-timer, set to 50 ns (typical), ensures a minimum time

each cycle to recharge the bootstrap capacitor. When the on-time is less than 300 ns, the minimum off-timer is

forced to 250 ns to ensure that the BST capacitor is charged in a single cycle. This is vital during wake up from

sleep mode when the BST capacitor is most likely discharged.

6.3.8 Synchronous Rectifier

The LM5164 provides an internal low-side synchronous rectifier N-channel MOSFET. This MOSFET provides a

low-resistance path for the inductor current to flow when the high-side MOSFET is turned off.

The synchronous rectifier operates in a diode emulation mode. Diode emulation enables the regulator to operate

in a pulse-skipping mode during light load conditions. This mode leads to a reduction in the average switching

frequency at light loads. Switching losses and FET gate driver losses, both of which are proportional to switching

frequency, are significantly reduced at very light loads and efficiency is improved. This pulse-skipping mode also

reduces the circulating inductor current and losses associated with conventional CCM at light loads.

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LM5164

SNVSAU4C – SEPTEMBER 2018 – REVISED APRIL 2024

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