STA1085 datasheet(56/127 Pages) STMICROELECTRONICS

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Electrical Characteristics

STA108x, STA109x

56/127

DS13319 Rev 2

This is a full static design. All frequencies can vary from the minimum of 0 MHz up to the

maximum value reported in the table.

Table 20. Frequency Limits

Symbol

Parameter

Test condition

Limit values

Unit

Min

Typ

Max

FCLK-R(1)

Operating frequency Cortex-R4 CP.



ECO Version (-E)

VDD= 1.14 V

TC = 85 °C

450

MHz

FCLK-R (1)

Operating frequency Cortex-R4 CPU.



High Version (-H)

533

MHz

FCLK-R (1)

Operating frequency Cortex-R4 CPU.



Premium Version (-P)

600

MHz

FCLK-M (1)

Operating Cortex - M3CPU frequency

208

MHz

FHCLK(1)

Operating frequency for Bus Matrix

and APB bridges

208

MHz

F52M_CLK(1)

Master clock for I2C0/1, UART0/1,

MSP0/1/2, EFT0/1

MHz

FCANSS_CLK(1)

Master clock for CAN1, local eSRAM

Cortex-M3

104

MHz

FVIP_PIXCLK(1)

Operating frequency for VIP pixel clock

MHz

FSSP_CLK(1)

SSP0/1/2 controller master clock

104

MHz

FSSI_SCK(1)

Operating frequency for SPI

(SSP0/1/2) serial clock in master mode

MHz

FSAI_BCLK(1)

Operating frequency for SAI bitclock

MHz

FI2S_BCLK(1)

Operating frequency for I2S bitclock

MHz

FSQI_CLK(1)

SQI controller master clock

250

MHz

FSQI_SCK(1)

Operating frequency for SQI serial bit

clock

125

MHz

FSDRAM_CLK(1)

Operating frequency for SDRAM

166

MHz

FCLCD_CLK(1)

Master clock for LCD controller

156

MHz

FCLCD_PIXCLK(1)

Operating frequency for LCD

controller pixel clock

MHz

FSDMMC_CLK(1)

Operating frequency for SDMMC0/1

data clock

MHz

FJTAG_TCK(1)

Operating frequency for JTAG

MHz

1. Values programmable through configurable PLL. Refer to SRC chapter for details.

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